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Searched refs:regDPPCLK_CGTT_BLK_CTRL_REG_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_5_offset.h143 #define regDPPCLK_CGTT_BLK_CTRL_REG_BASE_IDX 1 macro
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H A Ddcn_3_5_0_offset.h1301 #define regDPPCLK_CGTT_BLK_CTRL_REG_BASE_IDX 1 macro
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H A Ddcn_3_6_0_offset.h291 #define regDPPCLK_CGTT_BLK_CTRL_REG_BASE_IDX 1 macro
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H A Ddcn_3_1_2_offset.h356 #define regDPPCLK_CGTT_BLK_CTRL_REG_BASE_IDX 1 macro
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H A Ddcn_3_1_4_offset.h1448 #define regDPPCLK_CGTT_BLK_CTRL_REG_BASE_IDX 1 macro
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H A Ddcn_3_2_1_offset.h149 #define regDPPCLK_CGTT_BLK_CTRL_REG_BASE_IDX 1 macro
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H A Ddcn_3_5_1_offset.h1280 #define regDPPCLK_CGTT_BLK_CTRL_REG_BASE_IDX 1 macro
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H A Ddcn_4_1_0_offset.h159 #define regDPPCLK_CGTT_BLK_CTRL_REG_BASE_IDX 1 macro
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H A Ddcn_3_1_6_offset.h556 #define regDPPCLK_CGTT_BLK_CTRL_REG_BASE_IDX 1 macro
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