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Searched refs:regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED12_BASE_IDX (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h6499 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED12_BASE_IDX 2 macro
H A Ddpcs_4_2_0_offset.h743 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED12_BASE_IDX 2 macro
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H A Ddpcs_4_2_3_offset.h776 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED12_BASE_IDX 2 macro
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H A Ddpcs_4_2_2_offset.h740 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED12_BASE_IDX 2 macro
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/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_5_offset.h11817 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED12_BASE_IDX global() macro
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H A Ddcn_3_5_0_offset.h9960 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED12_BASE_IDX 2 macro
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H A Ddcn_3_6_0_offset.h12037 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED12_BASE_IDX global() macro
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H A Ddcn_3_1_2_offset.h11952 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED12_BASE_IDX global() macro
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H A Ddcn_3_1_4_offset.h11061 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED12_BASE_IDX global() macro
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H A Ddcn_3_2_1_offset.h11235 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED12_BASE_IDX global() macro
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H A Ddcn_3_5_1_offset.h9939 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED12_BASE_IDX 2 macro
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H A Ddcn_4_1_0_offset.h11536 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED12_BASE_IDX global() macro
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H A Ddcn_3_1_6_offset.h12308 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED12_BASE_IDX global() macro
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