Searched refs:pmfw_breakdown (Results 1 – 6 of 6) sorted by relevance
673 base->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.wm_type = WATERMARKS_CLOCK_RANGE; in dcn3_fpu_build_wm_range_table() 674 base->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_dcfclk = 0; in dcn3_fpu_build_wm_range_table() 675 base->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_dcfclk = 0xFFFF; in dcn3_fpu_build_wm_range_table() 676 base->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_uclk = min_uclk_mhz; in dcn3_fpu_build_wm_range_table() 677 base->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_uclk = 0xFFFF; in dcn3_fpu_build_wm_range_table() 684 // base->bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.wm_type = WATERMARKS_CLOCK_RANGE; in dcn3_fpu_build_wm_range_table() 685 // base->bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.min_dcfclk = TUNED VALUE; in dcn3_fpu_build_wm_range_table() 686 // base->bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.max_dcfclk = 0xFFFF; in dcn3_fpu_build_wm_range_table() 687 // base->bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.min_uclk = TUNED VALUE; in dcn3_fpu_build_wm_range_table() 688 // base->bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown in dcn3_fpu_build_wm_range_table() [all...]
342 table->Watermarks.WatermarkRow[WM_DCEFCLK][i].MinClock = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdown.min_dcfclk; in dcn3_notify_wm_ranges() 343 table->Watermarks.WatermarkRow[WM_DCEFCLK][i].MaxClock = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdown.max_dcfclk; in dcn3_notify_wm_ranges() 344 table->Watermarks.WatermarkRow[WM_DCEFCLK][i].MinUclk = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdown.min_uclk; in dcn3_notify_wm_ranges() 345 table->Watermarks.WatermarkRow[WM_DCEFCLK][i].MaxUclk = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdown.max_uclk; in dcn3_notify_wm_ranges() 347 table->Watermarks.WatermarkRow[WM_DCEFCLK][i].Flags = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdown.wm_type; in dcn3_notify_wm_ranges()
190 clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.wm_type = WATERMARKS_CLOCK_RANGE; in dcn401_build_wm_range_table() 191 clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_dcfclk = min_dcfclk_mhz; in dcn401_build_wm_range_table() 192 clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_dcfclk = 0xFFFF; in dcn401_build_wm_range_table() 193 clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_uclk = min_uclk_mhz; in dcn401_build_wm_range_table() 194 clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_uclk = 0xFFFF; in dcn401_build_wm_range_table() 203 clk_mgr->bw_params->wm_table.nv_entries[WM_1A].pmfw_breakdown.wm_type = WATERMARKS_DUMMY_PSTATE; in dcn401_build_wm_range_table() 204 clk_mgr->bw_params->wm_table.nv_entries[WM_1A].pmfw_breakdown.min_dcfclk = min_dcfclk_mhz; in dcn401_build_wm_range_table() 205 clk_mgr->bw_params->wm_table.nv_entries[WM_1A].pmfw_breakdown.max_dcfclk = 0xFFFF; in dcn401_build_wm_range_table() 206 clk_mgr->bw_params->wm_table.nv_entries[WM_1A].pmfw_breakdown.min_uclk = min_uclk_mhz; in dcn401_build_wm_range_table() 207 clk_mgr->bw_params->wm_table.nv_entries[WM_1A].pmfw_breakdown in dcn401_build_wm_range_table() [all...]
203 clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.min_dcfclk = dcfclk_mhz_for_the_second_state; in dcn32_build_wm_range_table_fpu() 205 clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.min_dcfclk = clk_mgr->base.bw_params->clk_table.entries[0].dcfclk_mhz; in dcn32_build_wm_range_table_fpu() 216 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.wm_type = WATERMARKS_CLOCK_RANGE; in dcn32_build_wm_range_table_fpu() 217 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_dcfclk = min_dcfclk_mhz; in dcn32_build_wm_range_table_fpu() 218 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_dcfclk = 0xFFFF; in dcn32_build_wm_range_table_fpu() 219 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_uclk = min_uclk_mhz; in dcn32_build_wm_range_table_fpu() 220 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_uclk = 0xFFFF; in dcn32_build_wm_range_table_fpu() 228 clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.wm_type = WATERMARKS_CLOCK_RANGE; in dcn32_build_wm_range_table_fpu() 229 clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.max_dcfclk = 0xFFFF; in dcn32_build_wm_range_table_fpu() 230 clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown in dcn32_build_wm_range_table_fpu() [all...]
166 } pmfw_breakdown; member
986 table->Watermarks.WatermarkRow[i].Flags = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdown.wm_type; in dcn32_notify_wm_ranges()