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Searched refs:pipe_index (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/
H A Ddml2_core_dcn4_calcs.h23 void dml2_core_calcs_get_pipe_regs(const struct dml2_display_cfg *dml2_display_cfg, struct dml2_core_internal_display_mode_lib *mode_lib, struct dml2_dchub_per_pipe_register_set *out, int pipe_index);
24 void dml2_core_calcs_get_stream_programming(const struct dml2_core_internal_display_mode_lib *mode_lib, struct dml2_per_stream_programming *out, int pipe_index);
25 void dml2_core_calcs_get_global_sync_programming(const struct dml2_core_internal_display_mode_lib *mode_lib, union dml2_global_sync_programming *out, int pipe_index);
30 void dml2_core_calcs_get_mall_allocation(struct dml2_core_internal_display_mode_lib *mode_lib, unsigned int *out, int pipe_index);
H A Ddml2_core_dcn4_calcs.c12700 struct dml2_dchub_per_pipe_register_set *out, int pipe_index) in dml2_core_calcs_get_pipe_regs() argument
12702 rq_dlg_get_rq_reg(&out->rq_regs, display_cfg, mode_lib, pipe_index); in dml2_core_calcs_get_pipe_regs()
12703 rq_dlg_get_dlg_reg(&mode_lib->scratch, &out->dlg_regs, &out->ttu_regs, display_cfg, mode_lib, pipe_index); in dml2_core_calcs_get_pipe_regs()
12704 out->det_size = dml_get_det_buffer_size_kbytes(mode_lib, pipe_index) / mode_lib->ip.config_return_buffer_segment_size_in_kbytes; in dml2_core_calcs_get_pipe_regs()
12707 void dml2_core_calcs_get_global_sync_programming(const struct dml2_core_internal_display_mode_lib *mode_lib, union dml2_global_sync_programming *out, int pipe_index) in dml2_core_calcs_get_global_sync_programming() argument
12709 out->dcn4x.vready_offset_pixels = dml_get_vready_offset(mode_lib, pipe_index); in dml2_core_calcs_get_global_sync_programming()
12710 out->dcn4x.vstartup_lines = dml_get_vstartup_calculated(mode_lib, pipe_index); in dml2_core_calcs_get_global_sync_programming()
12711 out->dcn4x.vupdate_offset_pixels = dml_get_vupdate_offset(mode_lib, pipe_index); in dml2_core_calcs_get_global_sync_programming()
12712 out->dcn4x.vupdate_vupdate_width_pixels = dml_get_vupdate_width(mode_lib, pipe_index); in dml2_core_calcs_get_global_sync_programming()
12713 out->dcn4x.pstate_keepout_start_lines = dml_get_pstate_keepout_dst_lines(mode_lib, pipe_index); in dml2_core_calcs_get_global_sync_programming()
12716 dml2_core_calcs_get_stream_programming(const struct dml2_core_internal_display_mode_lib * mode_lib,struct dml2_per_stream_programming * out,int pipe_index) dml2_core_calcs_get_stream_programming() argument
12896 dml2_core_calcs_get_mall_allocation(struct dml2_core_internal_display_mode_lib * mode_lib,unsigned int * out,int pipe_index) dml2_core_calcs_get_mall_allocation() argument
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/linux/include/media/
H A Dvsp1.h47 int vsp1_du_setup_lif(struct device *dev, unsigned int pipe_index,
120 void vsp1_du_atomic_begin(struct device *dev, unsigned int pipe_index);
121 int vsp1_du_atomic_update(struct device *dev, unsigned int pipe_index,
124 void vsp1_du_atomic_flush(struct device *dev, unsigned int pipe_index,
/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_top/
H A Ddml2_top_soc15.c399 unsigned int pipe_index; in find_shift_for_valid_cache_id_assignment() local
416 for (pipe_index = 0; pipe_index < pipe_count; pipe_index++) { in find_shift_for_valid_cache_id_assignment()
418 pipe_vp_startx[pipe_index], pipe_vp_endx[pipe_index], 0, 0)) { in find_shift_for_valid_cache_id_assignment()
1021 int config_index, pipe_index; in dml2_top_soc15_build_mcache_programming() local
1028 for (pipe_index = 0; pipe_index < params->mcache_configurations[config_index].num_pipes; pipe_index in dml2_top_soc15_build_mcache_programming()
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/linux/sound/pci/echoaudio/
H A Dechoaudio_dsp.c781 static void set_audio_format(struct echoaudio *chip, u16 pipe_index, in set_audio_format() argument
849 "set_audio_format[%d] = %x\n", pipe_index, dsp_format); in set_audio_format()
850 chip->comm_page->audio_format[pipe_index] = cpu_to_le16(dsp_format); in set_audio_format()
937 static inline int is_pipe_allocated(struct echoaudio *chip, u16 pipe_index) in is_pipe_allocated() argument
939 return (chip->pipe_alloc_mask & (1 << pipe_index)); in is_pipe_allocated()
1055 int pipe_index, int interleave) in allocate_pipes() argument
1061 "allocate_pipes: ch=%d int=%d\n", pipe_index, interleave); in allocate_pipes()
1067 channel_mask |= 1 << (pipe_index + i); in allocate_pipes()
1074 chip->comm_page->position[pipe_index] = 0; in allocate_pipes()
1078 pipe->index = pipe_index; in allocate_pipes()
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H A Dechoaudio.c528 int pipe_index, int interleave) in init_engine() argument
548 err = allocate_pipes(chip, pipe, pipe_index, interleave); in init_engine()
552 pipe_index, err); in init_engine()
556 dev_dbg(chip->card->dev, "allocate_pipes()=%d\n", pipe_index); in init_engine()
601 chip->substream[pipe_index] = substream; in init_engine()
686 int pipe_index = ((struct audiopipe *)runtime->private_data)->index; in pcm_prepare() local
716 if (snd_BUG_ON(pipe_index >= px_num(chip))) in pcm_prepare()
726 if (snd_BUG_ON(!is_pipe_allocated(chip, pipe_index))) { in pcm_prepare()
731 set_audio_format(chip, pipe_index, &format); in pcm_prepare()
/linux/drivers/gpu/drm/renesas/rz-du/
H A Drzg2l_du_vsp.h64 unsigned int pipe_index);
76 unsigned int pipe_index) in rzg2l_du_vsp_get_drm_plane() argument
H A Drzg2l_du_vsp.c74 unsigned int pipe_index) in rzg2l_du_vsp_get_drm_plane() argument
82 if (vsp_plane->index == pipe_index) in rzg2l_du_vsp_get_drm_plane()
/linux/drivers/media/platform/renesas/vsp1/
H A Dvsp1_drm.c636 * @pipe_index: the DRM pipeline index
643 * The @pipe_index argument selects which DRM pipeline to setup. The number of
654 int vsp1_du_setup_lif(struct device *dev, unsigned int pipe_index, in vsp1_du_setup_lif() argument
664 if (pipe_index >= vsp1->info->lif_count) in vsp1_du_setup_lif()
667 drm_pipe = &vsp1->drm->pipe[pipe_index]; in vsp1_du_setup_lif()
732 __func__, pipe_index, cfg->width, cfg->height, in vsp1_du_setup_lif()
761 vsp1_write(vsp1, VI6_DISP_IRQ_STA(pipe_index), 0); in vsp1_du_setup_lif()
762 vsp1_write(vsp1, VI6_DISP_IRQ_ENB(pipe_index), 0); in vsp1_du_setup_lif()
787 * @pipe_index: the DRM pipeline index
789 void vsp1_du_atomic_begin(struct device *dev, unsigned int pipe_index) in vsp1_du_atomic_begin() argument
824 vsp1_du_atomic_update(struct device * dev,unsigned int pipe_index,unsigned int rpf_index,const struct vsp1_du_atomic_config * cfg) vsp1_du_atomic_update() argument
897 vsp1_du_atomic_flush(struct device * dev,unsigned int pipe_index,const struct vsp1_du_atomic_pipe_config * cfg) vsp1_du_atomic_flush() argument
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H A Dvsp1_video.h42 unsigned int pipe_index; member
/linux/drivers/gpu/drm/
H A Ddrm_vblank.c1742 unsigned int pipe_index; in drm_wait_vblank_ioctl() local
1765 pipe_index = high_pipe >> _DRM_VBLANK_HIGH_CRTC_SHIFT; in drm_wait_vblank_ioctl()
1767 pipe_index = flags & _DRM_VBLANK_SECONDARY ? 1 : 0; in drm_wait_vblank_ioctl()
1774 if (pipe_index == 0) in drm_wait_vblank_ioctl()
1776 pipe_index--; in drm_wait_vblank_ioctl()
1781 pipe = pipe_index; in drm_wait_vblank_ioctl()
/linux/include/linux/
H A Dpipe_fs_i.h49 * but then we can't use 'union pipe_index' for an anonymous
53 union pipe_index { union
90 /* This has to match the 'union pipe_index' above */
/linux/fs/
H A Dpipe.c232 union pipe_index idx = { .head_tail = READ_ONCE(pipe->head_tail) }; in pipe_readable()
423 union pipe_index idx = { .head_tail = READ_ONCE(pipe->head_tail) }; in pipe_writable()
662 union pipe_index idx; in pipe_poll()
/linux/drivers/staging/media/atomisp/pci/
H A Datomisp_compat_css20.c432 int pipe_index = 0, i; in __create_stream() local
437 multi_pipes[pipe_index++] = stream_env->pipes[i]; in __create_stream()
439 if (pipe_index == 0) in __create_stream()
450 pipe_index, multi_pipes, &stream_env->stream) != 0) in __create_stream()
2286 int pipe_index = atomisp_get_pipe_index(asd); in atomisp_get_css_frame_info() local
2290 stream_index = (pipe_index == IA_CSS_PIPE_ID_YUVPP) ? in atomisp_get_css_frame_info()
2295 .pipes[pipe_index], &info)) { in atomisp_get_css_frame_info()
/linux/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml2_translation_helper.c1195 unsigned int pipe_index = 0; in dml2_populate_pipe_to_plane_index_mapping() local
1211 pipe_index = pipe->pipe_idx; in dml2_populate_pipe_to_plane_index_mapping()
1213 if (pipe->stream && dml_to_dc_pipe_mapping->dml_pipe_idx_to_plane_index_valid[pipe_index] == false) { in dml2_populate_pipe_to_plane_index_mapping()
1214 dml_to_dc_pipe_mapping->dml_pipe_idx_to_plane_index[pipe_index] = plane_index; in dml2_populate_pipe_to_plane_index_mapping()
1216 dml_to_dc_pipe_mapping->dml_pipe_idx_to_plane_index_valid[pipe_index] = true; in dml2_populate_pipe_to_plane_index_mapping()
/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc_dmub_srv.c427 fams_pipe_data->pipe_index[pipe_idx++] = head_pipe->plane_res.hubp->inst; in dc_dmub_srv_populate_fams_pipe_info()
432 fams_pipe_data->pipe_index[pipe_idx++] = split_pipe->plane_res.hubp->inst; in dc_dmub_srv_populate_fams_pipe_info()
/linux/drivers/gpu/drm/amd/display/dmub/inc/
H A Ddmub_cmd.h5564 uint8_t pipe_index[4]; member