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Searched refs:mmVGA_CACHE_CONTROL (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h4378 #define mmVGA_CACHE_CONTROL 0x00CB macro
H A Ddce_8_0_d.h5143 #define mmVGA_CACHE_CONTROL 0xcb macro
H A Ddce_11_0_d.h6103 #define mmVGA_CACHE_CONTROL 0xcb macro
H A Ddce_10_0_d.h6026 #define mmVGA_CACHE_CONTROL 0xcb macro
H A Ddce_11_2_d.h7777 #define mmVGA_CACHE_CONTROL 0xcb macro
H A Ddce_12_0_offset.h572 #define mmVGA_CACHE_CONTROL 0x000b macro
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/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h35 #define mmVGA_CACHE_CONTROL 0x000b macro
H A Ddcn_3_0_1_offset.h166 #define mmVGA_CACHE_CONTROL 0x000b macro
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H A Ddcn_1_0_offset.h406 #define mmVGA_CACHE_CONTROL 0x000b macro
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H A Ddcn_2_1_0_offset.h110 #define mmVGA_CACHE_CONTROL 0x000b macro
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H A Ddcn_3_0_2_offset.h50 #define mmVGA_CACHE_CONTROL 0x000b macro
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H A Ddcn_2_0_0_offset.h50 #define mmVGA_CACHE_CONTROL 0x000b macro
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H A Ddcn_3_0_0_offset.h32 #define mmVGA_CACHE_CONTROL 0x000b macro
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