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Searched refs:mmVCE_UENC_REG_CLOCK_GATING (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/vce/
H A Dvce_1_0_d.h55 #define mmVCE_UENC_REG_CLOCK_GATING 0x8170 macro
H A Dvce_2_0_d.h52 #define mmVCE_UENC_REG_CLOCK_GATING 0x81f0 macro
H A Dvce_3_0_d.h56 #define mmVCE_UENC_REG_CLOCK_GATING 0x81f0 macro
H A Dvce_4_0_offset.h118 #define mmVCE_UENC_REG_CLOCK_GATING 0x0bf0 macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvce_v3_0.c197 data = RREG32(mmVCE_UENC_REG_CLOCK_GATING); in vce_v3_0_set_vce_sw_clock_gating()
199 WREG32(mmVCE_UENC_REG_CLOCK_GATING, data); in vce_v3_0_set_vce_sw_clock_gating()
221 data = RREG32(mmVCE_UENC_REG_CLOCK_GATING); in vce_v3_0_set_vce_sw_clock_gating()
223 WREG32(mmVCE_UENC_REG_CLOCK_GATING, data); in vce_v3_0_set_vce_sw_clock_gating()
555 WREG32_P(mmVCE_UENC_REG_CLOCK_GATING, 0x3F, ~0x3F); in vce_v3_0_mc_resume()