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Searched refs:mmDSCL2_SCL_MODE_BASE_IDX (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_1_offset.h2535 #define mmDSCL2_SCL_MODE_BASE_IDX 2 macro
H A Ddcn_3_0_1_offset.h4745 #define mmDSCL2_SCL_MODE_BASE_IDX 2 macro
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H A Ddcn_1_0_offset.h4466 #define mmDSCL2_SCL_MODE_BASE_IDX 2 macro
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H A Ddcn_2_1_0_offset.h4515 #define mmDSCL2_SCL_MODE_BASE_IDX 2 macro
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H A Ddcn_3_0_2_offset.h5289 #define mmDSCL2_SCL_MODE_BASE_IDX 2 macro
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H A Ddcn_2_0_0_offset.h5453 #define mmDSCL2_SCL_MODE_BASE_IDX 2 macro
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H A Ddcn_3_0_0_offset.h5340 #define mmDSCL2_SCL_MODE_BASE_IDX 2 macro
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