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Searched refs:mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK4 (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_d.h3746 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK4 0x1757 macro
H A Ddce_11_0_d.h4327 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK4 0x1677 macro
H A Ddce_10_0_d.h4372 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK4 0x1677 macro
H A Ddce_11_2_d.h5559 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK4 0x1677 macro
H A Ddce_12_0_offset.h1454 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK4 0x042d macro
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/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h413 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK4 0x010d macro
H A Ddcn_3_0_1_offset.h608 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK4 0x010d macro
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H A Ddcn_1_0_offset.h1038 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK4 0x010d macro
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H A Ddcn_2_1_0_offset.h668 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK4 0x010d macro
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H A Ddcn_3_0_2_offset.h580 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK4 0x010d macro
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H A Ddcn_2_0_0_offset.h706 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK4 0x010d macro
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H A Ddcn_3_0_0_offset.h596 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK4 0x010d macro
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