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Searched refs:mmDC_I2C_DDCVGA_SPEED_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h7724 #define mmDC_I2C_DDCVGA_SPEED_BASE_IDX 2 macro
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/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h1693 #define mmDC_I2C_DDCVGA_SPEED_BASE_IDX 2 macro
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