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Searched refs:intel_dkl_phy_read (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/i915/display/ !
H A Dintel_dkl_phy.h17 intel_dkl_phy_read(struct intel_display *display, struct intel_dkl_phy_reg reg);
H A Dintel_dkl_phy.c47 intel_dkl_phy_read(struct intel_display *display, struct intel_dkl_phy_reg reg) in intel_dkl_phy_read() function
H A Dintel_dpll_mgr.c3631 hw_state->mg_refclkin_ctl = intel_dkl_phy_read(display, in dkl_pll_get_hw_state()
3636 intel_dkl_phy_read(display, DKL_CLKTOP2_HSCLKCTL(tc_port)); in dkl_pll_get_hw_state()
3644 intel_dkl_phy_read(display, DKL_CLKTOP2_CORECLKCTL1(tc_port)); in dkl_pll_get_hw_state()
3648 hw_state->mg_pll_div0 = intel_dkl_phy_read(display, DKL_PLL_DIV0(tc_port)); in dkl_pll_get_hw_state()
3654 hw_state->mg_pll_div1 = intel_dkl_phy_read(display, DKL_PLL_DIV1(tc_port)); in dkl_pll_get_hw_state()
3658 hw_state->mg_pll_ssc = intel_dkl_phy_read(display, DKL_PLL_SSC(tc_port)); in dkl_pll_get_hw_state()
3664 hw_state->mg_pll_bias = intel_dkl_phy_read(display, DKL_PLL_BIAS(tc_port)); in dkl_pll_get_hw_state()
3669 intel_dkl_phy_read(display, DKL_PLL_TDC_COLDST_BIAS(tc_port)); in dkl_pll_get_hw_state()
3853 val = intel_dkl_phy_read(display, DKL_REFCLKIN_CTL(tc_port)); in dkl_pll_write()
3858 val = intel_dkl_phy_read(display, DKL_CLKTOP2_CORECLKCTL1(tc_port)); in dkl_pll_write()
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H A Dintel_ddi.c2157 if (ln0 != intel_dkl_phy_read(display, DKL_DP_MODE(tc_port, 0))) in tgl_dkl_phy_check_and_rewrite()
2159 if (ln1 != intel_dkl_phy_read(display, DKL_DP_MODE(tc_port, 1))) in tgl_dkl_phy_check_and_rewrite()
2180 ln0 = intel_dkl_phy_read(display, DKL_DP_MODE(tc_port, 0)); in icl_program_mg_dp_mode()
2181 ln1 = intel_dkl_phy_read(display, DKL_DP_MODE(tc_port, 1)); in icl_program_mg_dp_mode()
H A Dintel_display_power_well.c556 if (wait_for(intel_dkl_phy_read(display, DKL_CMN_UC_DW_27(tc_port)) & in icl_tc_phy_aux_power_well_enable()