Searched refs:clk_settle (Results 1 – 6 of 6) sorted by relevance
43 cfg->clk_settle = 95000; in phy_mipi_dphy_calc_config() 129 if (cfg->clk_settle < 95000 || cfg->clk_settle > 300000) in phy_mipi_dphy_config_validate()
314 u32 clk_settle; member 322 u32 clk_settle; member 610 csis->clk_settle = 0; in mipi_csis_calculate_params() 613 lane_rate, csis->clk_settle, csis->hs_settle); in mipi_csis_calculate_params() 621 if (csis->debug.clk_settle < 4) { in mipi_csis_calculate_params() 623 csis->debug.clk_settle); in mipi_csis_calculate_params() 624 csis->clk_settle = csis->debug.clk_settle; in mipi_csis_calculate_params() 648 MIPI_CSIS_DPHY_CMN_CTRL_CLKSETTLE(csis->clk_settle)); in mipi_csis_set_params() 914 csis->debug.clk_settle in mipi_csis_debugfs_init() [all...]
287 int clk_settle; in atomisp_csi2_configure_isp2401() local 306 clk_settle = atomisp_csi2_configure_calc(coeff_clk_settle, mipi_freq, in atomisp_csi2_configure_isp2401() 319 n == 0 ? clk_settle : dat_settle); in atomisp_csi2_configure_isp2401()
62 * @clk_settle:71 unsigned int clk_settle; member
325 s32 clk_settle; member
332 timing->clk_settle = cio2_rx_timing(CIO2_CSIRX_DLY_CNT_SETTLE_CLANE_A, in cio2_csi2_calc_timing() 346 dev_dbg(dev, "freq cs value is %d\n", timing->clk_settle); in cio2_csi2_calc_timing() 388 writel(timing.clk_settle, q->csi_rx_base + in cio2_hw_init()