/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/ ! |
H A D | display_mode_vba_30.c | 340 bool WritebackEnable[], 539 bool WritebackEnable[], 1873 if (v->WritebackEnable[k]) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2350 if (v->WritebackEnable[k] == true) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2364 && v->WritebackEnable[j] == true) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2776 v->WritebackEnable, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2791 if (v->WritebackEnable[k] == true) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 3030 v->WritebackEnable, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 3635 if (v->WritebackEnable[k] == true in dml30_ModeSupportAndSystemConfigurationFull() 3642 } else if (v->WritebackEnable[ in dml30_ModeSupportAndSystemConfigurationFull() 5179 CalculateWatermarksAndDRAMSpeedChangeSupport(struct display_mode_lib * mode_lib,unsigned int PrefetchMode,unsigned int NumberOfActivePlanes,unsigned int MaxLineBufferLines,unsigned int LineBufferSize,unsigned int DPPOutputBufferPixels,unsigned int DETBufferSizeInKByte,unsigned int WritebackInterfaceBufferSize,double DCFCLK,double ReturnBW,bool GPUVMEnable,unsigned int dpte_group_bytes[],unsigned int MetaChunkSize,double UrgentLatency,double ExtraLatency,double WritebackLatency,double WritebackChunkSize,double SOCCLK,double DRAMClockChangeLatency,double SRExitTime,double SREnterPlusExitTime,double DCFCLKDeepSleep,unsigned int DPPPerPlane[],bool DCCEnable[],double DPPCLK[],unsigned int DETBufferSizeY[],unsigned int DETBufferSizeC[],unsigned int SwathHeightY[],unsigned int SwathHeightC[],unsigned int LBBitPerPixel[],double SwathWidthY[],double SwathWidthC[],double HRatio[],double HRatioChroma[],unsigned int vtaps[],unsigned int VTAPsChroma[],double VRatio[],double VRatioChroma[],unsigned int HTotal[],double PixelClock[],unsigned int BlendingAndTiming[],double BytePerPixelDETY[],double BytePerPixelDETC[],double DSTXAfterScaler[],double DSTYAfterScaler[],bool WritebackEnable[],enum source_format_class WritebackPixelFormat[],double WritebackDestinationWidth[],double WritebackDestinationHeight[],double WritebackSourceHeight[],enum clock_change_support * DRAMClockChangeSupport,double * UrgentWatermark,double * WritebackUrgentWatermark,double * DRAMClockChangeWatermark,double * WritebackDRAMClockChangeWatermark,double * StutterExitWatermark,double * StutterEnterPlusExitWatermark,double * MinActiveDRAMClockChangeLatencySupported) CalculateWatermarksAndDRAMSpeedChangeSupport() argument 5934 CalculateStutterEfficiency(int NumberOfActivePlanes,long ROBBufferSizeInKByte,double TotalDataReadBandwidth,double DCFCLK,double ReturnBW,double SRExitTime,bool SynchronizedVBlank,int DPPPerPlane[],unsigned int DETBufferSizeY[],int BytePerPixelY[],double BytePerPixelDETY[],double SwathWidthY[],int SwathHeightY[],int SwathHeightC[],double DCCRateLuma[],double DCCRateChroma[],int HTotal[],int VTotal[],double PixelClock[],double VRatio[],enum scan_direction_class SourceScan[],int BlockHeight256BytesY[],int BlockWidth256BytesY[],int BlockHeight256BytesC[],int BlockWidth256BytesC[],int DCCYMaxUncompressedBlock[],int DCCCMaxUncompressedBlock[],int VActive[],bool DCCEnable[],bool WritebackEnable[],double ReadBandwidthPlaneLuma[],double ReadBandwidthPlaneChroma[],double meta_row_bw[],double dpte_row_bw[],double * StutterEfficiencyNotIncludingVBlank,double * StutterEfficiency,double * StutterPeriodOut) CalculateStutterEfficiency() argument [all...] |
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn21/ ! |
H A D | display_mode_vba_21.c | 329 bool WritebackEnable[], 1479 if (mode_lib->vba.WritebackEnable[k]) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2040 if (mode_lib->vba.WritebackEnable[k] == true) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2057 && mode_lib->vba.WritebackEnable[j] == true) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2458 mode_lib->vba.WritebackEnable, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2774 if (mode_lib->vba.WritebackEnable[k] == true) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 3641 if (mode_lib->vba.WritebackEnable[k] == true in dml21_ModeSupportAndSystemConfigurationFull() 3648 } else if (mode_lib->vba.WritebackEnable[k] == true in dml21_ModeSupportAndSystemConfigurationFull() 3655 } else if (mode_lib->vba.WritebackEnable[k] == true) { in dml21_ModeSupportAndSystemConfigurationFull() 3690 if (mode_lib->vba.WritebackEnable[ in dml21_ModeSupportAndSystemConfigurationFull() 5239 CalculateWatermarksAndDRAMSpeedChangeSupport(struct display_mode_lib * mode_lib,unsigned int PrefetchMode,unsigned int NumberOfActivePlanes,unsigned int MaxLineBufferLines,unsigned int LineBufferSize,unsigned int DPPOutputBufferPixels,unsigned int DETBufferSizeInKByte,unsigned int WritebackInterfaceLumaBufferSize,unsigned int WritebackInterfaceChromaBufferSize,double DCFCLK,double UrgentOutOfOrderReturn,double ReturnBW,bool GPUVMEnable,int dpte_group_bytes[],unsigned int MetaChunkSize,double UrgentLatency,double ExtraLatency,double WritebackLatency,double WritebackChunkSize,double SOCCLK,double DRAMClockChangeLatency,double SRExitTime,double SREnterPlusExitTime,double DCFCLKDeepSleep,int DPPPerPlane[],bool DCCEnable[],double DPPCLK[],double SwathWidthSingleDPPY[],unsigned int SwathHeightY[],double ReadBandwidthPlaneLuma[],unsigned int SwathHeightC[],double ReadBandwidthPlaneChroma[],unsigned int LBBitPerPixel[],double SwathWidthY[],double HRatio[],unsigned int vtaps[],unsigned int VTAPsChroma[],double VRatio[],unsigned int HTotal[],double PixelClock[],unsigned int BlendingAndTiming[],double BytePerPixelDETY[],double BytePerPixelDETC[],bool WritebackEnable[],enum source_format_class WritebackPixelFormat[],double WritebackDestinationWidth[],double WritebackDestinationHeight[],double WritebackSourceHeight[],enum clock_change_support * DRAMClockChangeSupport,double * UrgentWatermark,double * WritebackUrgentWatermark,double * DRAMClockChangeWatermark,double * WritebackDRAMClockChangeWatermark,double * StutterExitWatermark,double * StutterEnterPlusExitWatermark,double * MinActiveDRAMClockChangeLatencySupported) CalculateWatermarksAndDRAMSpeedChangeSupport() argument [all...] |
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ ! |
H A D | display_mode_vba_32.c | 86 if (mode_lib->vba.WritebackEnable[k]) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 601 if (mode_lib->vba.WritebackEnable[k] == true) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 616 mode_lib->vba.WritebackEnable[j] == true) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1236 if (mode_lib->vba.WritebackEnable[k] == true) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1482 if (mode_lib->vba.WritebackEnable[k] == true in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1488 } else if (mode_lib->vba.WritebackEnable[k] == true) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1557 mode_lib->vba.WritebackEnable, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1621 mode_lib->vba.WritebackEnable, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1840 if (mode_lib->vba.WritebackEnable[k] == true && mode_lib->vba.WritebackPixelFormat[k] == dm_444_64) { in dml32_ModeSupportAndSystemConfigurationFull() 1845 } else if (mode_lib->vba.WritebackEnable[ in dml32_ModeSupportAndSystemConfigurationFull() [all...] |
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/ ! |
H A D | display_mode_vba_314.c | 528 bool WritebackEnable[], 2041 if (v->WritebackEnable[k]) { 2522 if (v->WritebackEnable[k] == true) { 2536 if (v->BlendingAndTiming[j] == k && v->WritebackEnable[j] == true) { 2981 if (v->WritebackEnable[k] == true) { 3207 if (v->WritebackEnable[k] == true && v->WritebackPixelFormat[k] == dm_444_32) { 3210 } else if (v->WritebackEnable[k] == true) { 3270 v->WritebackEnable, 3967 if (v->WritebackEnable[k] == true && v->WritebackPixelFormat[k] == dm_444_64) { 3970 } else if (v->WritebackEnable[ 6389 CalculateStutterEfficiency(struct display_mode_lib * mode_lib,int CompressedBufferSizeInkByte,bool UnboundedRequestEnabled,int ConfigReturnBufferSizeInKByte,int MetaFIFOSizeInKEntries,int ZeroSizeBufferEntries,int NumberOfActivePlanes,int ROBBufferSizeInKByte,double TotalDataReadBandwidth,double DCFCLK,double ReturnBW,double COMPBUF_RESERVED_SPACE_64B,double COMPBUF_RESERVED_SPACE_ZS,double SRExitTime,double SRExitZ8Time,bool SynchronizedVBlank,double Z8StutterEnterPlusExitWatermark,double StutterEnterPlusExitWatermark,bool ProgressiveToInterlaceUnitInOPP,bool Interlace[],double MinTTUVBlank[],int DPPPerPlane[],unsigned int DETBufferSizeY[],int BytePerPixelY[],double BytePerPixelDETY[],double SwathWidthY[],int SwathHeightY[],int SwathHeightC[],double NetDCCRateLuma[],double NetDCCRateChroma[],double DCCFractionOfZeroSizeRequestsLuma[],double DCCFractionOfZeroSizeRequestsChroma[],int HTotal[],int VTotal[],double PixelClock[],double VRatio[],enum scan_direction_class SourceScan[],int BlockHeight256BytesY[],int BlockWidth256BytesY[],int BlockHeight256BytesC[],int BlockWidth256BytesC[],int DCCYMaxUncompressedBlock[],int DCCCMaxUncompressedBlock[],int VActive[],bool DCCEnable[],bool WritebackEnable[],double ReadBandwidthPlaneLuma[],double ReadBandwidthPlaneChroma[],double meta_row_bw[],double dpte_row_bw[],double * StutterEfficiencyNotIncludingVBlank,double * StutterEfficiency,int * NumberOfStutterBurstsPerFrame,double * Z8StutterEfficiencyNotIncludingVBlank,double * Z8StutterEfficiency,int * Z8NumberOfStutterBurstsPerFrame,double * StutterPeriod) global() argument [all...] |
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ ! |
H A D | display_mode_vba_31.c | 519 bool WritebackEnable[], 2023 if (v->WritebackEnable[k]) { 2503 if (v->WritebackEnable[k] == true) { 2517 if (v->BlendingAndTiming[j] == k && v->WritebackEnable[j] == true) { 2962 if (v->WritebackEnable[k] == true) { 3188 if (v->WritebackEnable[k] == true && v->WritebackPixelFormat[k] == dm_444_32) { 3191 } else if (v->WritebackEnable[k] == true) { 3251 v->WritebackEnable, 3876 if (v->WritebackEnable[k] == true && v->WritebackPixelFormat[k] == dm_444_64) { 3879 } else if (v->WritebackEnable[ 6294 CalculateStutterEfficiency(struct display_mode_lib * mode_lib,int CompressedBufferSizeInkByte,bool UnboundedRequestEnabled,int ConfigReturnBufferSizeInKByte,int MetaFIFOSizeInKEntries,int ZeroSizeBufferEntries,int NumberOfActivePlanes,int ROBBufferSizeInKByte,double TotalDataReadBandwidth,double DCFCLK,double ReturnBW,double COMPBUF_RESERVED_SPACE_64B,double COMPBUF_RESERVED_SPACE_ZS,double SRExitTime,double SRExitZ8Time,bool SynchronizedVBlank,double Z8StutterEnterPlusExitWatermark,double StutterEnterPlusExitWatermark,bool ProgressiveToInterlaceUnitInOPP,bool Interlace[],double MinTTUVBlank[],int DPPPerPlane[],unsigned int DETBufferSizeY[],int BytePerPixelY[],double BytePerPixelDETY[],double SwathWidthY[],int SwathHeightY[],int SwathHeightC[],double NetDCCRateLuma[],double NetDCCRateChroma[],double DCCFractionOfZeroSizeRequestsLuma[],double DCCFractionOfZeroSizeRequestsChroma[],int HTotal[],int VTotal[],double PixelClock[],double VRatio[],enum scan_direction_class SourceScan[],int BlockHeight256BytesY[],int BlockWidth256BytesY[],int BlockHeight256BytesC[],int BlockWidth256BytesC[],int DCCYMaxUncompressedBlock[],int DCCCMaxUncompressedBlock[],int VActive[],bool DCCEnable[],bool WritebackEnable[],double ReadBandwidthPlaneLuma[],double ReadBandwidthPlaneChroma[],double meta_row_bw[],double dpte_row_bw[],double * StutterEfficiencyNotIncludingVBlank,double * StutterEfficiency,int * NumberOfStutterBurstsPerFrame,double * Z8StutterEfficiencyNotIncludingVBlank,double * Z8StutterEfficiency,int * Z8NumberOfStutterBurstsPerFrame,double * StutterPeriod) global() argument [all...] |
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ ! |
H A D | display_mode_vba_20.c | 1095 if (mode_lib->vba.WritebackEnable[k]) { in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1490 if (mode_lib->vba.WritebackEnable[k]) in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1978 if (mode_lib->vba.WritebackEnable[k] == true) { in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1995 && mode_lib->vba.WritebackEnable[j] == true) { in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2518 if (mode_lib->vba.WritebackEnable[k]) { in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 3407 if (mode_lib->vba.WritebackEnable[k] == true in dml20_ModeSupportAndSystemConfigurationFull() 3414 } else if (mode_lib->vba.WritebackEnable[k] == true in dml20_ModeSupportAndSystemConfigurationFull() 3421 } else if (mode_lib->vba.WritebackEnable[k] == true) { in dml20_ModeSupportAndSystemConfigurationFull() 3497 if (mode_lib->vba.WritebackEnable[k] == true) { in dml20_ModeSupportAndSystemConfigurationFull() 3535 if (mode_lib->vba.WritebackEnable[ in dml20_ModeSupportAndSystemConfigurationFull() [all...] |
H A D | display_mode_vba_20v2.c | 1155 if (mode_lib->vba.WritebackEnable[k]) { in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1526 if (mode_lib->vba.WritebackEnable[k]) in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2014 if (mode_lib->vba.WritebackEnable[k] == true) { in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2031 && mode_lib->vba.WritebackEnable[j] == true) { in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2552 if (mode_lib->vba.WritebackEnable[k]) { in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 3514 if (mode_lib->vba.WritebackEnable[k] == true in dml20v2_ModeSupportAndSystemConfigurationFull() 3521 } else if (mode_lib->vba.WritebackEnable[k] == true in dml20v2_ModeSupportAndSystemConfigurationFull() 3528 } else if (mode_lib->vba.WritebackEnable[k] == true) { in dml20v2_ModeSupportAndSystemConfigurationFull() 3604 if (mode_lib->vba.WritebackEnable[k] == true) { in dml20v2_ModeSupportAndSystemConfigurationFull() 3642 if (mode_lib->vba.WritebackEnable[ in dml20v2_ModeSupportAndSystemConfigurationFull() [all...] |
/linux/drivers/gpu/drm/amd/display/dc/dml2/ ! |
H A D | display_mode_core_structs.h | 641 dml_bool_t WritebackEnable[__DML_NUM_PLANES__]; member 1372 dml_bool_t *WritebackEnable; member 1570 dml_bool_t *WritebackEnable; member
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H A D | dml2_translation_helper.c | 1234 out->WritebackEnable[location] = wb_info->wb_enabled; in populate_dml_writeback_cfg_from_stream_state()
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/linux/drivers/gpu/drm/amd/display/dc/dml/ ! |
H A D | display_mode_vba.h | 484 bool WritebackEnable[DC__NUM_DPP__MAX]; member
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H A D | display_mode_vba.c | 658 mode_lib->vba.WritebackEnable[mode_lib->vba.NumberOfActivePlanes] = dout->wb_enable; in fetch_pipe_params()
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