Searched refs:VCO_CTRL11 (Results 1 – 1 of 1) sorted by relevance
93 #define VCO_CTRL11 AVPLL_CTRL(11) macro 281 * HDMI divider start at VCO_CTRL11, bit 7; MSB is enable, lower 2 bit in berlin2_avpll_channel_recalc_rate() 284 reg = readl_relaxed(ch->base + VCO_CTRL11) >> 7; in berlin2_avpll_channel_recalc_rate() 290 * AV1 divider start at VCO_CTRL11, bit 28; MSB is enable, lower 2 bit in berlin2_avpll_channel_recalc_rate() 294 reg = readl_relaxed(ch->base + VCO_CTRL11); in berlin2_avpll_channel_recalc_rate()