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Searched refs:UVD_CGC_CTRL__UDEC_MODE_MASK (Results 1 – 22 of 22) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h450 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x00020000L macro
H A Duvd_3_1_sh_mask.h239 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x20000 macro
H A Duvd_4_2_sh_mask.h239 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x20000 macro
H A Duvd_4_0_sh_mask.h68 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x00020000L macro
H A Duvd_6_0_sh_mask.h263 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x20000 macro
H A Duvd_5_0_sh_mask.h261 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x20000 macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v4_0_5.c737 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v4_0_5_disable_clock_gating()
824 UVD_CGC_CTRL__UDEC_MODE_MASK | in vcn_v4_0_5_disable_clock_gating_dpg_mode()
883 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v4_0_5_enable_clock_gating()
H A Duvd_v5_0.c701 UVD_CGC_CTRL__UDEC_MODE_MASK | in uvd_v5_0_set_sw_clock_gating()
H A Dvcn_v1_0.c558 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v1_0_disable_clock_gating()
659 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v1_0_enable_clock_gating()
719 UVD_CGC_CTRL__UDEC_MODE_MASK | in vcn_v1_0_clock_gating_dpg_mode()
H A Dvcn_v2_0.c600 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v2_0_disable_clock_gating()
677 UVD_CGC_CTRL__UDEC_MODE_MASK | in vcn_v2_0_clock_gating_dpg_mode()
739 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v2_0_enable_clock_gating()
H A Dvcn_v4_0.c800 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v4_0_disable_clock_gating()
887 UVD_CGC_CTRL__UDEC_MODE_MASK | in vcn_v4_0_disable_clock_gating_dpg_mode()
946 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v4_0_enable_clock_gating()
H A Dvcn_v2_5.c833 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v2_5_disable_clock_gating()
911 UVD_CGC_CTRL__UDEC_MODE_MASK | in vcn_v2_5_clock_gating_dpg_mode()
973 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v2_5_enable_clock_gating()
H A Dvcn_v3_0.c837 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v3_0_disable_clock_gating()
939 UVD_CGC_CTRL__UDEC_MODE_MASK | in vcn_v3_0_clock_gating_dpg_mode()
999 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v3_0_enable_clock_gating()
H A Duvd_v6_0.c1358 UVD_CGC_CTRL__UDEC_MODE_MASK | in uvd_v6_0_set_sw_clock_gating()
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h943 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x00020000L macro
H A Dvcn_2_5_sh_mask.h2011 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x00020000L macro
H A Dvcn_2_0_0_sh_mask.h1962 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x00020000L macro
H A Dvcn_2_6_0_sh_mask.h3682 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x00020000L macro
H A Dvcn_3_0_0_sh_mask.h2741 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x00020000L macro
H A Dvcn_5_0_0_sh_mask.h119 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x00020000L macro
H A Dvcn_4_0_5_sh_mask.h115 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x00020000L macro
H A Dvcn_4_0_3_sh_mask.h119 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x00020000L macro
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