Searched refs:UTMIP_PLL_CFG2 (Results 1 – 2 of 2) sorted by relevance
192 #define UTMIP_PLL_CFG2 0x488 macro 1162 value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG2); in clk_pllu_enable() 1172 writel_relaxed(value, pll->clk_base + UTMIP_PLL_CFG2); in clk_pllu_enable() 1785 value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG2); in clk_pllu_tegra114_enable() 1795 writel_relaxed(value, pll->clk_base + UTMIP_PLL_CFG2); in clk_pllu_tegra114_enable()
158 #define UTMIP_PLL_CFG2 0x488 macro 2823 reg = readl_relaxed(clk_base + UTMIP_PLL_CFG2); in tegra210_utmi_param_configure() 2833 writel_relaxed(reg, clk_base + UTMIP_PLL_CFG2); in tegra210_utmi_param_configure() 2858 reg = readl_relaxed(clk_base + UTMIP_PLL_CFG2); in tegra210_utmi_param_configure() 2865 writel_relaxed(reg, clk_base + UTMIP_PLL_CFG2); in tegra210_utmi_param_configure()