Searched refs:U3P_U3_PHYA_REG0 (Results 1 – 1 of 1) sorted by relevance
132 #define U3P_U3_PHYA_REG0 0x000 macro 532 tmp = readl(u3_banks->phya + U3P_U3_PHYA_REG0); in u3_phy_params_show() 586 mtk_phy_update_field(u3_banks->phya + U3P_U3_PHYA_REG0, in u3_phy_params_write() 968 mtk_phy_update_field(phya + U3P_U3_PHYA_REG0, P3A_RG_CLKDRV_OFF, 0x1); in pcie_phy_instance_init() 1355 mtk_phy_update_field(u3_banks->phya + U3P_U3_PHYA_REG0, P3A_RG_IEXT_INTR, in phy_efuse_set()