xref: /linux/drivers/gpu/drm/i915/display/dvo_sil164.c (revision ab93e0dd72c37d378dd936f031ffb83ff2bd87ce)
1 /**************************************************************************
2 
3 Copyright © 2006 Dave Airlie
4 
5 All Rights Reserved.
6 
7 Permission is hereby granted, free of charge, to any person obtaining a
8 copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sub license, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
14 
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial portions
17 of the Software.
18 
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
23 ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 
27 **************************************************************************/
28 
29 #include <drm/drm_print.h>
30 
31 #include "intel_display_types.h"
32 #include "intel_dvo_dev.h"
33 
34 #define SIL164_VID 0x0001
35 #define SIL164_DID 0x0006
36 
37 #define SIL164_VID_LO 0x00
38 #define SIL164_VID_HI 0x01
39 #define SIL164_DID_LO 0x02
40 #define SIL164_DID_HI 0x03
41 #define SIL164_REV    0x04
42 #define SIL164_RSVD   0x05
43 #define SIL164_FREQ_LO 0x06
44 #define SIL164_FREQ_HI 0x07
45 
46 #define SIL164_REG8 0x08
47 #define SIL164_8_VEN (1<<5)
48 #define SIL164_8_HEN (1<<4)
49 #define SIL164_8_DSEL (1<<3)
50 #define SIL164_8_BSEL (1<<2)
51 #define SIL164_8_EDGE (1<<1)
52 #define SIL164_8_PD   (1<<0)
53 
54 #define SIL164_REG9 0x09
55 #define SIL164_9_VLOW (1<<7)
56 #define SIL164_9_MSEL_MASK (0x7<<4)
57 #define SIL164_9_TSEL (1<<3)
58 #define SIL164_9_RSEN (1<<2)
59 #define SIL164_9_HTPLG (1<<1)
60 #define SIL164_9_MDI (1<<0)
61 
62 #define SIL164_REGC 0x0c
63 #define SIL164_C_SCNT (1<<7)
64 #define SIL164_C_PLLF_MASK (0xf<<1)
65 #define SIL164_C_PLLF_REC (4<<1)
66 #define SIL164_C_PFEN (1<<0)
67 
68 struct sil164_priv {
69 	//I2CDevRec d;
70 	bool quiet;
71 };
72 
73 #define SILPTR(d) ((SIL164Ptr)(d->DriverPrivate.ptr))
74 
sil164_readb(struct intel_dvo_device * dvo,int addr,u8 * ch)75 static bool sil164_readb(struct intel_dvo_device *dvo, int addr, u8 *ch)
76 {
77 	struct sil164_priv *sil = dvo->dev_priv;
78 	struct i2c_adapter *adapter = dvo->i2c_bus;
79 	u8 out_buf[2];
80 	u8 in_buf[2];
81 
82 	struct i2c_msg msgs[] = {
83 		{
84 			.addr = dvo->target_addr,
85 			.flags = 0,
86 			.len = 1,
87 			.buf = out_buf,
88 		},
89 		{
90 			.addr = dvo->target_addr,
91 			.flags = I2C_M_RD,
92 			.len = 1,
93 			.buf = in_buf,
94 		}
95 	};
96 
97 	out_buf[0] = addr;
98 	out_buf[1] = 0;
99 
100 	if (i2c_transfer(adapter, msgs, 2) == 2) {
101 		*ch = in_buf[0];
102 		return true;
103 	}
104 
105 	if (!sil->quiet) {
106 		DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n",
107 			  addr, adapter->name, dvo->target_addr);
108 	}
109 	return false;
110 }
111 
sil164_writeb(struct intel_dvo_device * dvo,int addr,u8 ch)112 static bool sil164_writeb(struct intel_dvo_device *dvo, int addr, u8 ch)
113 {
114 	struct sil164_priv *sil = dvo->dev_priv;
115 	struct i2c_adapter *adapter = dvo->i2c_bus;
116 	u8 out_buf[2];
117 	struct i2c_msg msg = {
118 		.addr = dvo->target_addr,
119 		.flags = 0,
120 		.len = 2,
121 		.buf = out_buf,
122 	};
123 
124 	out_buf[0] = addr;
125 	out_buf[1] = ch;
126 
127 	if (i2c_transfer(adapter, &msg, 1) == 1)
128 		return true;
129 
130 	if (!sil->quiet) {
131 		DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
132 			  addr, adapter->name, dvo->target_addr);
133 	}
134 
135 	return false;
136 }
137 
138 /* Silicon Image 164 driver for chip on i2c bus */
sil164_init(struct intel_dvo_device * dvo,struct i2c_adapter * adapter)139 static bool sil164_init(struct intel_dvo_device *dvo,
140 			struct i2c_adapter *adapter)
141 {
142 	/* this will detect the SIL164 chip on the specified i2c bus */
143 	struct sil164_priv *sil;
144 	unsigned char ch;
145 
146 	sil = kzalloc(sizeof(*sil), GFP_KERNEL);
147 	if (sil == NULL)
148 		return false;
149 
150 	dvo->i2c_bus = adapter;
151 	dvo->dev_priv = sil;
152 	sil->quiet = true;
153 
154 	if (!sil164_readb(dvo, SIL164_VID_LO, &ch))
155 		goto out;
156 
157 	if (ch != (SIL164_VID & 0xff)) {
158 		DRM_DEBUG_KMS("sil164 not detected got %d: from %s Target %d.\n",
159 			  ch, adapter->name, dvo->target_addr);
160 		goto out;
161 	}
162 
163 	if (!sil164_readb(dvo, SIL164_DID_LO, &ch))
164 		goto out;
165 
166 	if (ch != (SIL164_DID & 0xff)) {
167 		DRM_DEBUG_KMS("sil164 not detected got %d: from %s Target %d.\n",
168 			  ch, adapter->name, dvo->target_addr);
169 		goto out;
170 	}
171 	sil->quiet = false;
172 
173 	DRM_DEBUG_KMS("init sil164 dvo controller successfully!\n");
174 	return true;
175 
176 out:
177 	kfree(sil);
178 	return false;
179 }
180 
sil164_detect(struct intel_dvo_device * dvo)181 static enum drm_connector_status sil164_detect(struct intel_dvo_device *dvo)
182 {
183 	u8 reg9;
184 
185 	sil164_readb(dvo, SIL164_REG9, &reg9);
186 
187 	if (reg9 & SIL164_9_HTPLG)
188 		return connector_status_connected;
189 	else
190 		return connector_status_disconnected;
191 }
192 
sil164_mode_valid(struct intel_dvo_device * dvo,const struct drm_display_mode * mode)193 static enum drm_mode_status sil164_mode_valid(struct intel_dvo_device *dvo,
194 					      const struct drm_display_mode *mode)
195 {
196 	return MODE_OK;
197 }
198 
sil164_mode_set(struct intel_dvo_device * dvo,const struct drm_display_mode * mode,const struct drm_display_mode * adjusted_mode)199 static void sil164_mode_set(struct intel_dvo_device *dvo,
200 			    const struct drm_display_mode *mode,
201 			    const struct drm_display_mode *adjusted_mode)
202 {
203 	/* As long as the basics are set up, since we don't have clock
204 	 * dependencies in the mode setup, we can just leave the
205 	 * registers alone and everything will work fine.
206 	 */
207 	/* recommended programming sequence from doc */
208 	/*sil164_writeb(sil, 0x08, 0x30);
209 	  sil164_writeb(sil, 0x09, 0x00);
210 	  sil164_writeb(sil, 0x0a, 0x90);
211 	  sil164_writeb(sil, 0x0c, 0x89);
212 	  sil164_writeb(sil, 0x08, 0x31);*/
213 	/* don't do much */
214 
215 	sil164_writeb(dvo, SIL164_REG8,
216 		      SIL164_8_VEN | SIL164_8_HEN);
217 	sil164_writeb(dvo, SIL164_REG9,
218 		      SIL164_9_TSEL);
219 	sil164_writeb(dvo, SIL164_REGC,
220 		      SIL164_C_PLLF_REC | SIL164_C_PFEN);
221 }
222 
223 /* set the SIL164 power state */
sil164_dpms(struct intel_dvo_device * dvo,bool enable)224 static void sil164_dpms(struct intel_dvo_device *dvo, bool enable)
225 {
226 	int ret;
227 	unsigned char ch;
228 
229 	ret = sil164_readb(dvo, SIL164_REG8, &ch);
230 	if (ret == false)
231 		return;
232 
233 	if (enable)
234 		ch |= SIL164_8_PD;
235 	else
236 		ch &= ~SIL164_8_PD;
237 
238 	sil164_writeb(dvo, SIL164_REG8, ch);
239 }
240 
sil164_get_hw_state(struct intel_dvo_device * dvo)241 static bool sil164_get_hw_state(struct intel_dvo_device *dvo)
242 {
243 	int ret;
244 	unsigned char ch;
245 
246 	ret = sil164_readb(dvo, SIL164_REG8, &ch);
247 	if (ret == false)
248 		return false;
249 
250 	if (ch & SIL164_8_PD)
251 		return true;
252 	else
253 		return false;
254 }
255 
sil164_dump_regs(struct intel_dvo_device * dvo)256 static void sil164_dump_regs(struct intel_dvo_device *dvo)
257 {
258 	u8 val;
259 
260 	sil164_readb(dvo, SIL164_FREQ_LO, &val);
261 	DRM_DEBUG_KMS("SIL164_FREQ_LO: 0x%02x\n", val);
262 	sil164_readb(dvo, SIL164_FREQ_HI, &val);
263 	DRM_DEBUG_KMS("SIL164_FREQ_HI: 0x%02x\n", val);
264 	sil164_readb(dvo, SIL164_REG8, &val);
265 	DRM_DEBUG_KMS("SIL164_REG8: 0x%02x\n", val);
266 	sil164_readb(dvo, SIL164_REG9, &val);
267 	DRM_DEBUG_KMS("SIL164_REG9: 0x%02x\n", val);
268 	sil164_readb(dvo, SIL164_REGC, &val);
269 	DRM_DEBUG_KMS("SIL164_REGC: 0x%02x\n", val);
270 }
271 
sil164_destroy(struct intel_dvo_device * dvo)272 static void sil164_destroy(struct intel_dvo_device *dvo)
273 {
274 	struct sil164_priv *sil = dvo->dev_priv;
275 
276 	if (sil) {
277 		kfree(sil);
278 		dvo->dev_priv = NULL;
279 	}
280 }
281 
282 const struct intel_dvo_dev_ops sil164_ops = {
283 	.init = sil164_init,
284 	.detect = sil164_detect,
285 	.mode_valid = sil164_mode_valid,
286 	.mode_set = sil164_mode_set,
287 	.dpms = sil164_dpms,
288 	.get_hw_state = sil164_get_hw_state,
289 	.dump_regs = sil164_dump_regs,
290 	.destroy = sil164_destroy,
291 };
292