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Searched refs:SDMA1_STATUS2_REG__ID_MASK (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h665 #define SDMA1_STATUS2_REG__ID_MASK 0x00000003L macro
H A Dsdma1_4_2_2_sh_mask.h683 #define SDMA1_STATUS2_REG__ID_MASK 0x00000007L macro
H A Dsdma1_4_2_sh_mask.h679 #define SDMA1_STATUS2_REG__ID_MASK 0x00000003L macro
/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_sh_mask.h1723 #define SDMA1_STATUS2_REG__ID_MASK 0x3 macro
H A Doss_3_0_1_sh_mask.h2249 #define SDMA1_STATUS2_REG__ID_MASK 0x3 macro
H A Doss_3_0_sh_mask.h2545 #define SDMA1_STATUS2_REG__ID_MASK 0x3 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h3188 #define SDMA1_STATUS2_REG__ID_MASK 0x00000007L macro
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/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_sh_mask.h2903 #define SDMA1_STATUS2_REG__ID_MASK 0x00000003L macro
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H A Dgc_12_0_0_sh_mask.h3228 #define SDMA1_STATUS2_REG__ID_MASK 0x00000003L macro
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H A Dgc_10_1_0_sh_mask.h3151 #define SDMA1_STATUS2_REG__ID_MASK 0x00000003L macro
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H A Dgc_11_0_3_sh_mask.h2984 #define SDMA1_STATUS2_REG__ID_MASK 0x00000003L macro
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H A Dgc_10_3_0_sh_mask.h3260 #define SDMA1_STATUS2_REG__ID_MASK 0x00000003L macro
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