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Searched refs:SDMA0_STATUS_REG__SRBM_IDLE__SHIFT (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h498 #define SDMA0_STATUS_REG__SRBM_IDLE__SHIFT 0xe macro
H A Dsdma0_4_0_sh_mask.h499 #define SDMA0_STATUS_REG__SRBM_IDLE__SHIFT 0xe macro
H A Dsdma0_4_2_sh_mask.h499 #define SDMA0_STATUS_REG__SRBM_IDLE__SHIFT 0xe macro
H A Dsdma0_4_2_2_sh_mask.h505 #define SDMA0_STATUS_REG__SRBM_IDLE__SHIFT 0xe macro
/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_sh_mask.h1018 #define SDMA0_STATUS_REG__SRBM_IDLE__SHIFT 0xe macro
H A Doss_2_0_sh_mask.h938 #define SDMA0_STATUS_REG__SRBM_IDLE__SHIFT 0xe macro
H A Doss_3_0_1_sh_mask.h1036 #define SDMA0_STATUS_REG__SRBM_IDLE__SHIFT 0xe macro
H A Doss_3_0_sh_mask.h1542 #define SDMA0_STATUS_REG__SRBM_IDLE__SHIFT 0xe macro
/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h190 #define SDMA0_STATUS_REG__SRBM_IDLE__SHIFT 0xe macro
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/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_sh_mask.h175 #define SDMA0_STATUS_REG__SRBM_IDLE__SHIFT 0xe macro
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H A Dgc_12_0_0_sh_mask.h156 #define SDMA0_STATUS_REG__SRBM_IDLE__SHIFT 0xe macro
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H A Dgc_10_1_0_sh_mask.h207 #define SDMA0_STATUS_REG__SRBM_IDLE__SHIFT 0xe macro
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H A Dgc_11_0_3_sh_mask.h181 #define SDMA0_STATUS_REG__SRBM_IDLE__SHIFT 0xe macro
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H A Dgc_10_3_0_sh_mask.h208 #define SDMA0_STATUS_REG__SRBM_IDLE__SHIFT 0xe macro
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