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Searched refs:NDCB0 (Results 1 – 1 of 1) sorted by relevance

/linux/drivers/mtd/nand/raw/
H A Dmarvell_nand.c185 #define NDCB0 0x48 macro
306 * is made by a field in NDCB0 register, and in another field in NDCB2 register.
313 * @ndcb0_csel: Value of the NDCB0 register with or without the flag
646 "NDCB0: 0x%08x\nNDCB1: 0x%08x\nNDCB2: 0x%08x\nNDCB3: 0x%08x\n", in marvell_nfc_send_cmd()
651 nfc->regs + NDCB0); in marvell_nfc_send_cmd()
652 writel_relaxed(nfc_op->ndcb[1], nfc->regs + NDCB0); in marvell_nfc_send_cmd()
653 writel(nfc_op->ndcb[2], nfc->regs + NDCB0); in marvell_nfc_send_cmd()
656 * Write NDCB0 four times only if LEN_OVRD is set or if ADDR6 or ADDR7 in marvell_nfc_send_cmd()
662 writel(nfc_op->ndcb[3], nfc->regs + NDCB0); in marvell_nfc_send_cmd()
2671 * converted in bit fields for NDCB0 an in marvell_nand_chip_init()
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