Searched refs:EMC_XM2DQSPADCTRL3 (Results 1 – 5 of 5) sorted by relevance
408 0x08000000 /* EMC_XM2DQSPADCTRL3 */512 0x08000000 /* EMC_XM2DQSPADCTRL3 */616 0x08000000 /* EMC_XM2DQSPADCTRL3 */720 0x08000000 /* EMC_XM2DQSPADCTRL3 */822 0x08000021 /* EMC_XM2DQSPADCTRL3 */925 0x0a000021 /* EMC_XM2DQSPADCTRL3 */1033 0x08000000 /* EMC_XM2DQSPADCTRL3 */1137 0x08000000 /* EMC_XM2DQSPADCTRL3 */1241 0x08000000 /* EMC_XM2DQSPADCTRL3 */1345 0x08000000 /* EMC_XM2DQSPADCTRL3 */[all...]
103 0x08000021 /* EMC_XM2DQSPADCTRL3 */207 0x08000021 /* EMC_XM2DQSPADCTRL3 */310 0x0c000021 /* EMC_XM2DQSPADCTRL3 */
1282 0x51451400 /* EMC_XM2DQSPADCTRL3 */1450 0x51451400 /* EMC_XM2DQSPADCTRL3 */1618 0x51451400 /* EMC_XM2DQSPADCTRL3 */1786 0x51451400 /* EMC_XM2DQSPADCTRL3 */1954 0x51451400 /* EMC_XM2DQSPADCTRL3 */2122 0x51451400 /* EMC_XM2DQSPADCTRL3 */2290 0x51451420 /* EMC_XM2DQSPADCTRL3 */2458 0x51451420 /* EMC_XM2DQSPADCTRL3 */2626 0x51451420 /* EMC_XM2DQSPADCTRL3 */2794 0x51451420 /* EMC_XM2DQSPADCTRL3 */[all...]
90 #define EMC_XM2DQSPADCTRL3 0x0f8 macro 317 [78] = EMC_XM2DQSPADCTRL3,476 val = readl_relaxed(emc->regs + EMC_XM2DQSPADCTRL3); in emc_dqs_preset() 480 writel_relaxed(val, emc->regs + EMC_XM2DQSPADCTRL3); in emc_dqs_preset()
116 #define EMC_XM2DQSPADCTRL3 0xf8 macro 430 EMC_XM2DQSPADCTRL3,