Searched refs:DP_TRAINING_PATTERN_1 (Results 1 – 15 of 15) sorted by relevance
81 case DP_TRAINING_PATTERN_1: in hibmc_dp_link_set_pattern() 118 ret = hibmc_dp_link_set_pattern(dp, DP_TRAINING_PATTERN_1); in hibmc_dp_link_training_cr_pre()
463 case DP_TRAINING_PATTERN_1: in drm_dp_link_train_wait() 559 link->train.pattern = DP_TRAINING_PATTERN_1; in drm_dp_link_clock_recovery() 737 link->train.pattern = DP_TRAINING_PATTERN_1; in drm_dp_link_train_fast()
831 case DP_TRAINING_PATTERN_1: in tegra_sor_dp_link_apply_training()
522 case DP_TRAINING_PATTERN_1: in amdgpu_atombios_dp_set_tp() 605 amdgpu_atombios_dp_set_tp(dp_info, DP_TRAINING_PATTERN_1); in amdgpu_atombios_dp_link_train_cr()
599 case DP_TRAINING_PATTERN_1: in cpt_set_link_train() 627 case DP_TRAINING_PATTERN_1: in g4x_set_link_train() 650 DP_PHY_DPRX, DP_TRAINING_PATTERN_1); in intel_dp_enable_port()
3825 case DP_TRAINING_PATTERN_1: in intel_ddi_set_link_train()
1505 if (!cdv_intel_dp_set_link_train(encoder, reg, DP_TRAINING_PATTERN_1)) { in cdv_intel_dp_start_link_train() 1511 cdv_intel_dplink_set_level(encoder, DP_TRAINING_PATTERN_1); in cdv_intel_dp_start_link_train()
590 # define DP_TRAINING_PATTERN_1 1 macro
280 DP_TRAINING_PATTERN_1); in analogix_dp_link_start()
1223 DP_TRAINING_PATTERN_1); in tc_main_link_enable()
1885 DP_TRAINING_PATTERN_1); in it6505_step_cr_train()
1574 aux_offset = DP_LINK_SCRAMBLING_DISABLE | DP_TRAINING_PATTERN_1; in mtk_dp_pattern()
1431 msm_dp_ctrl_train_pattern_set(ctrl, DP_TRAINING_PATTERN_1 | in msm_dp_ctrl_link_train_1()
853 DP_TRAINING_PATTERN_1 | DP_LINK_SCRAMBLING_DISABLE); in cdns_mhdp_link_training_init()
1143 if ((t & DP_TRAINING_PATTERN_MASK) == DP_TRAINING_PATTERN_1) { in dp_aux_ch_ctl_link_training()