Searched refs:DMA_DSBL_WR_INV (Results 1 – 2 of 2) sorted by relevance
53 #define DMA_DSBL_WR_INV 0x00020000 /* No EC inval. on slave writes */ macro
451 csr |= (DMA_DSBL_RD_DRN | DMA_DSBL_WR_INV | DMA_FIFO_INV); in init_restart_ledma() 1146 * This is needed, because DMA_DSBL_WR_INV is set. in lance_start_xmit()