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Searched refs:DAR (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/dma/
H A Dtxx9dmac.h73 u64 DAR; /* Destination Address Register */ member
83 u32 DAR; member
207 u64 DAR; member
213 u32 DAR; member
H A Dtxx9dmac.c287 " CHAR: %#llx SAR: %#llx DAR: %#llx CNTR: %#x" in txx9dmac_dump_regs()
291 channel64_readq(dc, DAR), in txx9dmac_dump_regs()
299 " CHAR: %#x SAR: %#x DAR: %#x CNTR: %#x" in txx9dmac_dump_regs()
303 channel32_readl(dc, DAR), in txx9dmac_dump_regs()
317 channel_writeq(dc, DAR, 0); in txx9dmac_reset_chan()
321 channel_writel(dc, DAR, 0); in txx9dmac_reset_chan()
474 (u64)desc->CHAR, desc->SAR, desc->DAR, desc->CNTR); in txx9dmac_dump_desc()
479 (u64)desc->CHAR, desc->SAR, desc->DAR, desc->CNTR, in txx9dmac_dump_desc()
487 d->CHAR, d->SAR, d->DAR, d->CNTR); in txx9dmac_dump_desc()
492 d->CHAR, d->SAR, d->DAR, in txx9dmac_dump_desc()
[all...]
H A Dpl330.c341 DAR, enumerator
732 dst == SAR ? "SAR" : (dst == DAR ? "DAR" : "CCR"), val); in _emit_MOV()
1401 /* DMAMOV DAR, x->dst_addr */ in _setup_xfer()
1402 off += _emit_MOV(dry_run, &buf[off], DAR, x->dst_addr); in _setup_xfer()
2399 /* If DMAMOV hasn't finished yet, SAR/DAR can be zero */ in pl330_get_current_xferred_count()
/linux/arch/sh/include/asm/
H A Ddma-register.h15 #define DAR 0x04 /* Destination Address Register */ macro
/linux/arch/powerpc/kernel/
H A Dhead_32.h25 stw r11, DAR(r10)
55 mtspr SPRN_DAR, r11 /* Tag DAR, to be used in DTLB Error */
84 lwz r10, DAR(r12)
H A Dhead_8xx.S37 * Also used for tagging DAR for DTLBerror.
260 mtspr SPRN_DAR, r11 /* Tag DAR */
399 * DAR is set to the calculated address.
448 mtdar r10 /* save ctr reg in DAR */
498 mtctr r11 /* restore ctr reg from DAR */
500 stw r10, DAR(r11)
H A Dasm-offsets.c129 OFFSET(DAR, thread_struct, dar); in main()
/linux/drivers/dma/sh/
H A Dshdmac.c38 #define DAR 0x04 /* Destination Address Register */ macro
217 sh_dmae_writel(sh_chan, hw->dar, DAR); in dmae_set_reg()
460 u32 dar_buf = sh_dmae_readl(sh_chan, DAR); in sh_dmae_desc_completed()
/linux/arch/sh/drivers/dma/
H A Ddma-sh.c217 * It's important that we don't accidentally write any value to SAR/DAR in sh_dmac_xfer_dma()
227 * SAR and DAR, regardless of value, in order for cascading to work. in sh_dmac_xfer_dma()
234 __raw_writel(chan->dar, (dma_base_addr(chan->chan) + DAR)); in sh_dmac_xfer_dma()
/linux/drivers/dma/dw/
H A Dregs.h41 DW_REG(DAR); /* Destination Address Register */
151 #define DWC_CTLL_DST_INC (0<<7) /* DAR update/not */
H A Dcore.c131 " SAR: 0x%x DAR: 0x%x LLP: 0x%x CTL: 0x%x:%08x\n", in dwc_dump_chan_regs()
133 channel_readl(dwc, DAR), in dwc_dump_chan_regs()
162 channel_writel(dwc, DAR, lli_read(desc, dar)); in dwc_do_single_block()
/linux/Documentation/arch/powerpc/
H A Dkvm-nested.rst495 | 0x1029 | 0x08 | RW | T | DAR |