Searched refs:CLK_TOP_DA_XTP_GLB_P2_SEL (Results 1 – 2 of 2) sorted by relevance
118 #define CLK_TOP_DA_XTP_GLB_P2_SEL 90 macro
242 MUX_GATE_CLR_SET_UPD(CLK_TOP_DA_XTP_GLB_P2_SEL, "da_xtp_glb_p2_sel", da_xtp_glb_p0_parents,