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Searched refs:tWP_min (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/mtd/nand/raw/
H A Dnand_timings.c64 .tWP_min = 50000,
109 .tWP_min = 25000,
154 .tWP_min = 17000,
199 .tWP_min = 15000,
244 .tWP_min = 12000,
289 .tWP_min = 10000,
595 spec_timings->tWP_min <= onfi_timings->tWP_min && in onfi_find_closest_sdr_mode()
H A Dfsmc_nand.c301 thiz = sdrt->tCS_min - sdrt->tWP_min; in fsmc_calc_timings()
321 tset = max(sdrt->tCS_min - sdrt->tWP_min, in fsmc_calc_timings()
336 twait = max3(sdrt->tRP_min, sdrt->tWP_min, twait_min); in fsmc_calc_timings()
H A Ds3c2410.c766 tacls = timings->tCLS_min - timings->tWP_min; in s3c2410_nand_setup_interface()
771 pdata->twrph0 = DIV_ROUND_UP(timings->tWP_min, 1000); in s3c2410_nand_setup_interface()
H A Ddavinci_nand.c859 cfg = TO_CYCLES(sdr->tWP_min, cyc_ns) - 1; in davinci_nand_setup_interface()
H A Dsunxi_nand.c1422 if (timings->tWP_min > min_clk_period) in sunxi_nfc_setup_interface()
1423 min_clk_period = timings->tWP_min; in sunxi_nfc_setup_interface()
H A Dpl35x-nand-controller.c834 val = TO_CYCLES(sdr->tWP_min, period_ns); in pl35x_nfc_setup_interface()
H A Dtegra_nand.c808 reg |= TIMING_TWP(OFFSET(DIV_ROUND_UP(timings->tWP_min, period), 1)); in tegra_nand_setup_timing()
H A Dcadence-nand-controller.c2487 (sdr->tWP_min + if_skew) <= (clk_period / 2) && in cadence_nand_setup_interface()
2494 twp_cnt = calc_cycl(sdr->tWP_min + if_skew, clk_period); in cadence_nand_setup_interface()
H A Ddenali.c874 rdwr_en_lo = DIV_ROUND_UP(max(timings->tRP_min, timings->tWP_min), t_x); in denali_setup_interface()
H A Drenesas-nand-controller.c908 if (sdr->tRP_min != sdr->tWP_min || sdr->tREH_min != sdr->tWH_min) { in rnandc_setup_interface()
H A Dmtk_nand.c586 twst = max(timings->tWP_min, twst) / 1000; in mtk_nfc_setup_interface()
H A Dstm32_fmc2_nand.c1440 twait = max_t(unsigned long, twait, sdrt->tWP_min); in stm32_fmc2_nfc_calc_timings()
/linux/include/linux/mtd/
H A Drawnand.h435 * @tWP_min: WE# pulse width
475 u32 tWP_min; member
/linux/drivers/mtd/nand/raw/atmel/
H A Dnand-controller.c1270 ncycles = DIV_ROUND_UP(conf->timings.sdr.tWP_min, mckperiodps); in atmel_smc_nand_prepare_smcconf()