Searched refs:ssc_enable (Results 1 – 8 of 8) sorted by relevance
| /linux/sound/soc/atmel/ |
| H A D | atmel-pcm.h | 40 u32 ssc_enable; /* SSC recv/trans enable */ member
|
| H A D | atmel_ssc_dai.c | 59 .ssc_enable = SSC_BIT(CR_TXEN),
69 .ssc_enable = SSC_BIT(CR_RXEN),
755 ssc_writel(ssc_p->ssc->regs, CR, dma_params->mask->ssc_enable); in atmel_ssc_trigger()
|
| /linux/drivers/clk/mediatek/ |
| H A D | clk-pllfh.h | 68 int (*ssc_enable)(struct mtk_fh *fh, u32 rate); member
|
| H A D | clk-fhctl.c | 233 .ssc_enable = fhctl_ssc_enable,
263 fh->ops->ssc_enable(fh, state.ssc_rate); in fhctl_hw_init()
|
| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
| H A D | dcn314_clk_mgr.c | 177 uint32_t ssc_enable; in dcn314_is_spll_ssc_enabled() local
179 REG_GET(CLK6_0_CLK6_spll_field_8, spll_ssc_en, &ssc_enable); in dcn314_is_spll_ssc_enabled()
181 return ssc_enable == 1; in dcn314_is_spll_ssc_enabled()
768 //uint32_t ssc_enable; in dcn314_read_ss_info_from_lut()
771 //REG_GET(CLK6_0_CLK6_spll_field_8, spll_ssc_en, &ssc_enable); in dcn314_read_ss_info_from_lut()
|
| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
| H A D | dcn35_clk_mgr.c | 599 uint32_t ssc_enable; in dcn35_is_spll_ssc_enabled() local
602 ssc_enable = REG_READ(CLK6_spll_field_8) & CLK6_spll_field_8__spll_ssc_en_MASK; in dcn35_is_spll_ssc_enabled()
604 ssc_enable = REG_READ(CLK5_spll_field_8) & CLK5_spll_field_8__spll_ssc_en_MASK; in dcn35_is_spll_ssc_enabled()
607 return ssc_enable != 0; in dcn35_is_spll_ssc_enabled()
|
| /linux/drivers/phy/ |
| H A D | phy-xgene.c | 1254 enum clk_type_t clk_type, int ssc_enable) in xgene_phy_hw_init_sata() argument
1290 if (ssc_enable) in xgene_phy_hw_init_sata()
1319 int ssc_enable) in xgene_phy_hw_initialize() argument
1326 rc = xgene_phy_hw_init_sata(ctx, clk_type, ssc_enable); in xgene_phy_hw_initialize()
|
| /linux/drivers/clk/ |
| H A D | clk-stm32f4.c | 545 bool ssc_enable; member
738 if (pll->ssc_enable) in stm32f4_pll_set_rate()
864 pll->ssc_enable = true; in stm32f4_pll_init_ssc()
|