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/linux/arch/mips/include/asm/
H A Dasm-eva.h19 #define kernel_ll(reg, addr) "ll " reg ", " addr "\n" argument
20 #define kernel_sc(reg, addr) "sc " reg ", " addr "\n" argument
21 #define kernel_lw(reg, addr) "lw " reg ", " addr "\n" argument
22 #define kernel_lwl(reg, addr) "lwl " reg ", " addr "\n" argument
23 #define kernel_lwr(reg, addr) "lwr " reg ", " add argument
24 kernel_lh(reg,addr) global() argument
25 kernel_lb(reg,addr) global() argument
26 kernel_lbu(reg,addr) global() argument
27 kernel_sw(reg,addr) global() argument
28 kernel_swl(reg,addr) global() argument
29 kernel_swr(reg,addr) global() argument
30 kernel_sh(reg,addr) global() argument
31 kernel_sb(reg,addr) global() argument
38 kernel_sd(reg,addr) global() argument
39 kernel_ld(reg,addr) global() argument
41 kernel_sd(reg,addr) global() argument
42 kernel_ld(reg,addr) global() argument
47 __BUILD_EVA_INSN(insn,reg,addr) global() argument
56 user_ll(reg,addr) global() argument
57 user_sc(reg,addr) global() argument
58 user_lw(reg,addr) global() argument
59 user_lwl(reg,addr) global() argument
60 user_lwr(reg,addr) global() argument
61 user_lh(reg,addr) global() argument
62 user_lb(reg,addr) global() argument
63 user_lbu(reg,addr) global() argument
65 user_ld(reg,addr) global() argument
66 user_sw(reg,addr) global() argument
67 user_swl(reg,addr) global() argument
68 user_swr(reg,addr) global() argument
69 user_sh(reg,addr) global() argument
70 user_sb(reg,addr) global() argument
72 user_sd(reg,addr) global() argument
78 user_ll(reg,addr) global() argument
79 user_sc(reg,addr) global() argument
80 user_lw(reg,addr) global() argument
81 user_lwl(reg,addr) global() argument
82 user_lwr(reg,addr) global() argument
83 user_lh(reg,addr) global() argument
84 user_lb(reg,addr) global() argument
85 user_lbu(reg,addr) global() argument
86 user_sw(reg,addr) global() argument
87 user_swl(reg,addr) global() argument
88 user_swr(reg,addr) global() argument
89 user_sh(reg,addr) global() argument
90 user_sb(reg,addr) global() argument
93 user_sd(reg,addr) global() argument
94 user_ld(reg,addr) global() argument
96 user_sd(reg,addr) global() argument
97 user_ld(reg,addr) global() argument
106 kernel_ll(reg,addr) global() argument
107 kernel_sc(reg,addr) global() argument
108 kernel_lw(reg,addr) global() argument
109 kernel_lwl(reg,addr) global() argument
110 kernel_lwr(reg,addr) global() argument
111 kernel_lh(reg,addr) global() argument
112 kernel_lb(reg,addr) global() argument
113 kernel_lbu(reg,addr) global() argument
114 kernel_sw(reg,addr) global() argument
115 kernel_swl(reg,addr) global() argument
116 kernel_swr(reg,addr) global() argument
117 kernel_sh(reg,addr) global() argument
118 kernel_sb(reg,addr) global() argument
125 kernel_sd(reg,addr) global() argument
126 kernel_ld(reg,addr) global() argument
128 kernel_sd(reg,addr) global() argument
129 kernel_ld(reg,addr) global() argument
134 __BUILD_EVA_INSN(insn,reg,addr) global() argument
143 user_ll(reg,addr) global() argument
144 user_sc(reg,addr) global() argument
145 user_lw(reg,addr) global() argument
146 user_lwl(reg,addr) global() argument
147 user_lwr(reg,addr) global() argument
148 user_lh(reg,addr) global() argument
149 user_lb(reg,addr) global() argument
150 user_lbu(reg,addr) global() argument
152 user_ld(reg,addr) global() argument
153 user_sw(reg,addr) global() argument
154 user_swl(reg,addr) global() argument
155 user_swr(reg,addr) global() argument
156 user_sh(reg,addr) global() argument
157 user_sb(reg,addr) global() argument
159 user_sd(reg,addr) global() argument
164 user_ll(reg,addr) global() argument
165 user_sc(reg,addr) global() argument
166 user_lw(reg,addr) global() argument
167 user_lwl(reg,addr) global() argument
168 user_lwr(reg,addr) global() argument
169 user_lh(reg,addr) global() argument
170 user_lb(reg,addr) global() argument
171 user_lbu(reg,addr) global() argument
172 user_sw(reg,addr) global() argument
173 user_swl(reg,addr) global() argument
174 user_swr(reg,addr) global() argument
175 user_sh(reg,addr) global() argument
176 user_sb(reg,addr) global() argument
179 user_sd(reg,addr) global() argument
180 user_ld(reg,addr) global() argument
182 user_sd(reg,addr) global() argument
183 user_ld(reg,addr) global() argument
[all...]
/linux/arch/parisc/include/asm/
H A Dasmregs.h11 rp: .reg %r2
12 arg3: .reg %r23
13 arg2: .reg %r24
14 arg1: .reg %r25
15 arg0: .reg %r26
16 dp: .reg %r27
17 ret0: .reg %r28
18 ret1: .reg %r29
19 sl: .reg %r29
20 sp: .reg
[all...]
/linux/tools/testing/selftests/powerpc/include/
H A Dvmx_asm.h9 #define PUSH_VMX(pos,reg) \ argument
10 li reg,pos; \
11 stvx v20,reg,%r1; \
12 addi reg,reg,16; \
13 stvx v21,reg,%r1; \
14 addi reg,reg,16; \
15 stvx v22,reg,%r1; \
16 addi reg,re
36 POP_VMX(pos,reg) global() argument
[all...]
/linux/drivers/media/cec/platform/s5p/
H A Dexynos_hdmi_cecctrl.c26 unsigned int reg; in s5p_cec_set_divider() local
30 if (regmap_read(cec->pmu, EXYNOS_HDMI_PHY_CONTROL, &reg)) { in s5p_cec_set_divider()
35 reg = (reg & ~(0x3FF << 16)) | (div_ratio << 16); in s5p_cec_set_divider()
37 if (regmap_write(cec->pmu, EXYNOS_HDMI_PHY_CONTROL, reg)) { in s5p_cec_set_divider()
44 writeb(0x0, cec->reg + S5P_CEC_DIVISOR_3); in s5p_cec_set_divider()
45 writeb(0x0, cec->reg + S5P_CEC_DIVISOR_2); in s5p_cec_set_divider()
46 writeb(0x0, cec->reg + S5P_CEC_DIVISOR_1); in s5p_cec_set_divider()
47 writeb(div_val, cec->reg + S5P_CEC_DIVISOR_0); in s5p_cec_set_divider()
52 u8 reg; in s5p_cec_enable_rx() local
61 u8 reg; s5p_cec_mask_rx_interrupts() local
71 u8 reg; s5p_cec_unmask_rx_interrupts() local
81 u8 reg; s5p_cec_mask_tx_interrupts() local
91 u8 reg; s5p_cec_unmask_tx_interrupts() local
101 u8 reg; s5p_cec_reset() local
118 u8 reg; s5p_cec_rx_reset() local
137 u8 reg; s5p_cec_copy_packet() local
[all...]
/linux/drivers/media/platform/samsung/s5p-jpeg/
H A Djpeg-hw-s5p.c19 unsigned long reg; in s5p_jpeg_reset() local
22 reg = readl(regs + S5P_JPG_SW_RESET); in s5p_jpeg_reset()
24 while (reg != 0) { in s5p_jpeg_reset()
26 reg = readl(regs + S5P_JPG_SW_RESET); in s5p_jpeg_reset()
37 unsigned long reg, m; in s5p_jpeg_input_raw_mode() local
45 reg = readl(regs + S5P_JPGCMOD); in s5p_jpeg_input_raw_mode()
46 reg &= ~S5P_MOD_SEL_MASK; in s5p_jpeg_input_raw_mode()
47 reg |= m; in s5p_jpeg_input_raw_mode()
48 writel(reg, regs + S5P_JPGCMOD); in s5p_jpeg_input_raw_mode()
53 unsigned long reg, in s5p_jpeg_proc_mode() local
67 unsigned long reg, m; s5p_jpeg_subsampling_mode() local
87 unsigned long reg; s5p_jpeg_dri() local
102 unsigned long reg; s5p_jpeg_qtbl() local
112 unsigned long reg; s5p_jpeg_htbl_ac() local
123 unsigned long reg; s5p_jpeg_htbl_dc() local
134 unsigned long reg; s5p_jpeg_y() local
149 unsigned long reg; s5p_jpeg_x() local
164 unsigned long reg; s5p_jpeg_rst_int_enable() local
175 unsigned long reg; s5p_jpeg_data_num_int_enable() local
186 unsigned long reg; s5p_jpeg_final_mcu_num_int_enable() local
203 unsigned long reg; s5p_jpeg_clear_timer_stat() local
212 unsigned long reg; s5p_jpeg_enc_stream_int() local
229 unsigned long reg; s5p_jpeg_clear_enc_stream_stat() local
238 unsigned long reg, f; s5p_jpeg_outform_raw() local
264 unsigned long reg; s5p_jpeg_coef() local
[all...]
H A Djpeg-hw-exynos4.c18 unsigned int reg; in exynos4_jpeg_sw_reset() local
20 reg = readl(base + EXYNOS4_JPEG_CNTL_REG); in exynos4_jpeg_sw_reset()
21 writel(reg & ~(EXYNOS4_DEC_MODE | EXYNOS4_ENC_MODE), in exynos4_jpeg_sw_reset()
24 reg = readl(base + EXYNOS4_JPEG_CNTL_REG); in exynos4_jpeg_sw_reset()
25 writel(reg & ~EXYNOS4_SOFT_RESET_HI, base + EXYNOS4_JPEG_CNTL_REG); in exynos4_jpeg_sw_reset()
29 writel(reg | EXYNOS4_SOFT_RESET_HI, base + EXYNOS4_JPEG_CNTL_REG); in exynos4_jpeg_sw_reset()
34 unsigned int reg; in exynos4_jpeg_set_enc_dec_mode() local
36 reg = readl(base + EXYNOS4_JPEG_CNTL_REG); in exynos4_jpeg_set_enc_dec_mode()
39 writel((reg & EXYNOS4_ENC_DEC_MODE_MASK) | in exynos4_jpeg_set_enc_dec_mode()
43 writel((reg in exynos4_jpeg_set_enc_dec_mode()
55 unsigned int reg; __exynos4_jpeg_set_img_fmt() local
139 unsigned int reg; __exynos4_jpeg_set_enc_out_fmt() local
171 unsigned int reg; exynos4_jpeg_set_interrupt() local
190 unsigned int reg; exynos4_jpeg_set_huf_table_enable() local
204 unsigned int reg; exynos4_jpeg_set_sys_int_enable() local
239 unsigned int reg; exynos4_jpeg_set_encode_tbl_select() local
252 unsigned int reg; exynos4_jpeg_set_dec_components() local
262 unsigned int reg; exynos4_jpeg_select_dec_q_tbl() local
272 unsigned int reg; exynos4_jpeg_select_dec_h_tbl() local
[all...]
H A Djpeg-hw-exynos3250.c20 u32 reg = 1; in exynos3250_jpeg_reset() local
25 while (reg != 0 && --count > 0) { in exynos3250_jpeg_reset()
28 reg = readl(regs + EXYNOS3250_SW_RESET); in exynos3250_jpeg_reset()
31 reg = 0; in exynos3250_jpeg_reset()
34 while (reg != 1 && --count > 0) { in exynos3250_jpeg_reset()
38 reg = readl(regs + EXYNOS3250_JPGDRI); in exynos3250_jpeg_reset()
62 u32 reg; in exynos3250_jpeg_clk_set() local
64 reg = readl(base + EXYNOS3250_JPGCMOD) & ~EXYNOS3250_HALF_EN_MASK; in exynos3250_jpeg_clk_set()
66 writel(reg | EXYNOS3250_HALF_EN, base + EXYNOS3250_JPGCMOD); in exynos3250_jpeg_clk_set()
71 u32 reg; in exynos3250_jpeg_input_raw_fmt() local
122 u32 reg; exynos3250_jpeg_set_y16() local
134 u32 reg, m; exynos3250_jpeg_proc_mode() local
148 u32 reg, m = 0; exynos3250_jpeg_subsampling_mode() local
176 u32 reg; exynos3250_jpeg_dri() local
184 unsigned long reg; exynos3250_jpeg_qtbl() local
195 unsigned long reg; exynos3250_jpeg_htbl_ac() local
207 unsigned long reg; exynos3250_jpeg_htbl_dc() local
219 u32 reg; exynos3250_jpeg_set_y() local
227 u32 reg; exynos3250_jpeg_set_x() local
247 u32 reg; exynos3250_jpeg_interrupts_enable() local
262 u32 reg; exynos3250_jpeg_enc_stream_bound() local
270 u32 reg; exynos3250_jpeg_output_raw_fmt() local
366 u32 reg; exynos3250_jpeg_offset() local
[all...]
/linux/drivers/scsi/qla2xxx/
H A Dqla_dbg.c107 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla27xx_dump_mpi_ram() local
118 if (qla_pci_disconnected(vha, reg)) in qla27xx_dump_mpi_ram()
125 wrt_reg_word(&reg->mailbox0, MBC_LOAD_DUMP_MPI_RAM); in qla27xx_dump_mpi_ram()
126 wrt_reg_word(&reg->mailbox1, LSW(addr)); in qla27xx_dump_mpi_ram()
127 wrt_reg_word(&reg->mailbox8, MSW(addr)); in qla27xx_dump_mpi_ram()
129 wrt_reg_word(&reg->mailbox2, MSW(LSD(dump_dma))); in qla27xx_dump_mpi_ram()
130 wrt_reg_word(&reg->mailbox3, LSW(LSD(dump_dma))); in qla27xx_dump_mpi_ram()
131 wrt_reg_word(&reg->mailbox6, MSW(MSD(dump_dma))); in qla27xx_dump_mpi_ram()
132 wrt_reg_word(&reg->mailbox7, LSW(MSD(dump_dma))); in qla27xx_dump_mpi_ram()
134 wrt_reg_word(&reg in qla27xx_dump_mpi_ram()
195 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; qla24xx_dump_ram() local
296 qla24xx_read_window(struct device_reg_24xx __iomem * reg,uint32_t iobase,uint32_t count,__be32 * buf) qla24xx_read_window() argument
310 qla24xx_pause_risc(struct device_reg_24xx __iomem * reg,struct qla_hw_data * ha) qla24xx_pause_risc() argument
326 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; qla24xx_soft_reset() local
383 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2xxx_dump_ram() local
462 qla2xxx_read_window(struct device_reg_2xxx __iomem * reg,uint32_t count,__be16 * buf) qla2xxx_read_window() argument
677 device_reg_t *reg; qla25xx_copy_mq() local
745 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2300_fw_dump() local
902 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2100_fw_dump() local
1083 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; qla24xx_fw_dump() local
1329 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; qla25xx_fw_dump() local
1642 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; qla81xx_fw_dump() local
1957 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; qla83xx_fw_dump() local
2667 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; ql_dump_regs() local
[all...]
/linux/drivers/gpu/drm/bridge/analogix/
H A Danalogix_dp_reg.c29 u32 reg; in analogix_dp_enable_video_mute() local
32 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
33 reg |= HDCP_VIDEO_MUTE; in analogix_dp_enable_video_mute()
34 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
36 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
37 reg &= ~HDCP_VIDEO_MUTE; in analogix_dp_enable_video_mute()
38 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
44 u32 reg; in analogix_dp_stop_video() local
46 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_stop_video()
47 reg in analogix_dp_stop_video()
53 u32 reg; analogix_dp_lane_swap() local
67 u32 reg; analogix_dp_init_analog_param() local
121 u32 reg; analogix_dp_reset() local
176 u32 reg; analogix_dp_config_interrupt() local
197 u32 reg; analogix_dp_mute_hpd_interrupt() local
211 u32 reg; analogix_dp_unmute_hpd_interrupt() local
232 u32 reg; analogix_dp_set_pll_power_down() local
253 u32 reg; analogix_dp_set_analog_power_down() local
357 u32 reg; analogix_dp_init_analog_func() local
381 u32 reg; analogix_dp_clear_hotplug_interrupts() local
395 u32 reg; analogix_dp_init_hpd() local
409 u32 reg; analogix_dp_force_hpd() local
418 u32 reg; analogix_dp_get_irq_type() local
445 u32 reg; analogix_dp_reset_aux() local
455 u32 reg; analogix_dp_init_aux() local
491 u32 reg; analogix_dp_get_plug_in_status() local
507 u32 reg; analogix_dp_enable_sw_function() local
516 u32 reg; analogix_dp_set_link_bandwidth() local
539 u32 reg; analogix_dp_get_link_bandwidth() local
547 u32 reg; analogix_dp_set_lane_count() local
568 u32 reg; analogix_dp_get_lane_count() local
615 u32 reg; analogix_dp_enable_enhanced_mode() local
631 u32 reg; analogix_dp_set_training_pattern() local
663 u32 reg; analogix_dp_reset_macro() local
678 u32 reg; analogix_dp_init_video() local
698 u32 reg; analogix_dp_set_video_color_format() local
718 u32 reg; analogix_dp_is_slave_video_stream_clock_on() local
748 u32 reg; analogix_dp_set_video_cr_mn() local
780 u32 reg; analogix_dp_set_video_timing_mode() local
795 u32 reg; analogix_dp_enable_video_master() local
812 u32 reg; analogix_dp_start_video() local
821 u32 reg; analogix_dp_is_video_stream_on() local
837 u32 reg; analogix_dp_config_video_slave_mode() local
869 u32 reg; analogix_dp_enable_scrambling() local
878 u32 reg; analogix_dp_disable_scrambling() local
978 u32 reg; analogix_dp_transfer() local
[all...]
/linux/drivers/memory/tegra/
H A Dtegra210.c21 .reg = 0x228,
25 .reg = 0x2e8,
37 .reg = 0x228,
41 .reg = 0x2f4,
53 .reg = 0x228,
57 .reg = 0x2e8,
69 .reg = 0x228,
73 .reg = 0x2f4,
85 .reg = 0x228,
89 .reg
[all...]
H A Dtegra114.c20 .reg = 0x34c,
32 .reg = 0x228,
36 .reg = 0x2e8,
48 .reg = 0x228,
52 .reg = 0x2f4,
64 .reg = 0x228,
68 .reg = 0x2e8,
80 .reg = 0x228,
84 .reg = 0x2f4,
96 .reg
[all...]
H A Dtegra124.c21 .reg = 0x34c,
33 .reg = 0x228,
37 .reg = 0x2e8,
49 .reg = 0x228,
53 .reg = 0x2f4,
65 .reg = 0x228,
69 .reg = 0x2e8,
81 .reg = 0x228,
85 .reg = 0x2f4,
97 .reg
[all...]
/linux/tools/perf/util/
H A Damd-sample-raw.c25 static void pr_ibs_fetch_ctl(union ibs_fetch_ctl reg) in pr_ibs_fetch_ctl() argument
52 if (reg.phy_addr_valid) in pr_ibs_fetch_ctl()
53 l1tlb_pgsz_str = l1tlb_pgsz_strs_erratum1347[reg.l1tlb_pgsz]; in pr_ibs_fetch_ctl()
55 if (reg.phy_addr_valid) in pr_ibs_fetch_ctl()
56 l1tlb_pgsz_str = l1tlb_pgsz_strs[reg.l1tlb_pgsz]; in pr_ibs_fetch_ctl()
57 ic_miss_str = ic_miss_strs[reg.ic_miss]; in pr_ibs_fetch_ctl()
63 reg.l3_miss_only, reg.fetch_oc_miss, reg.fetch_l3_miss); in pr_ibs_fetch_ctl()
68 reg in pr_ibs_fetch_ctl()
75 pr_ic_ibs_extd_ctl(union ic_ibs_extd_ctl reg) pr_ic_ibs_extd_ctl() argument
80 pr_ibs_op_ctl(union ibs_op_ctl reg) pr_ibs_op_ctl() argument
99 pr_ibs_op_data(union ibs_op_data reg) pr_ibs_op_data() argument
110 pr_ibs_op_data2_extended(union ibs_op_data2 reg) pr_ibs_op_data2_extended() argument
137 pr_ibs_op_data2_default(union ibs_op_data2 reg) pr_ibs_op_data2_default() argument
156 pr_ibs_op_data2(union ibs_op_data2 reg) pr_ibs_op_data2() argument
163 pr_ibs_op_data3(union ibs_op_data3 reg) pr_ibs_op_data3() argument
[all...]
/linux/drivers/net/ethernet/sfc/
H A Dio.h54 static inline u32 efx_reg(struct efx_nic *efx, unsigned int reg) in efx_reg() argument
56 return efx->reg_base + reg; in efx_reg()
61 unsigned int reg) in _efx_writeq() argument
63 __raw_writeq((__force u64)value, efx->membase + reg); in _efx_writeq()
65 static inline __le64 _efx_readq(struct efx_nic *efx, unsigned int reg) in _efx_readq() argument
67 return (__force __le64)__raw_readq(efx->membase + reg); in _efx_readq()
72 unsigned int reg) in _efx_writed() argument
74 __raw_writel((__force u32)value, efx->membase + reg); in _efx_writed()
76 static inline __le32 _efx_readd(struct efx_nic *efx, unsigned int reg) in _efx_readd() argument
78 return (__force __le32)__raw_readl(efx->membase + reg); in _efx_readd()
83 efx_writeo(struct efx_nic * efx,const efx_oword_t * value,unsigned int reg) efx_writeo() argument
106 efx_writed(struct efx_nic * efx,const efx_dword_t * value,unsigned int reg) efx_writed() argument
118 efx_reado(struct efx_nic * efx,efx_oword_t * value,unsigned int reg) efx_reado() argument
136 efx_readd(struct efx_nic * efx,efx_dword_t * value,unsigned int reg) efx_readd() argument
147 efx_writeo_table(struct efx_nic * efx,const efx_oword_t * value,unsigned int reg,unsigned int index) efx_writeo_table() argument
154 efx_reado_table(struct efx_nic * efx,efx_oword_t * value,unsigned int reg,unsigned int index) efx_reado_table() argument
167 efx_paged_reg(struct efx_nic * efx,unsigned int page,unsigned int reg) efx_paged_reg() argument
174 _efx_writeo_page(struct efx_nic * efx,efx_oword_t * value,unsigned int reg,unsigned int page) _efx_writeo_page() argument
192 efx_writeo_page(efx,value,reg,page) global() argument
203 _efx_writed_page(struct efx_nic * efx,const efx_dword_t * value,unsigned int reg,unsigned int page) _efx_writed_page() argument
207 efx_writed_page(efx,value,reg,page) global() argument
[all...]
/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_dcb_82598.c21 u32 reg = 0; in ixgbe_dcb_config_rx_arbiter_82598() local
26 reg = IXGBE_READ_REG(hw, IXGBE_RUPPBMR) | IXGBE_RUPPBMR_MQA; in ixgbe_dcb_config_rx_arbiter_82598()
27 IXGBE_WRITE_REG(hw, IXGBE_RUPPBMR, reg); in ixgbe_dcb_config_rx_arbiter_82598()
29 reg = IXGBE_READ_REG(hw, IXGBE_RMCS); in ixgbe_dcb_config_rx_arbiter_82598()
31 reg &= ~IXGBE_RMCS_ARBDIS; in ixgbe_dcb_config_rx_arbiter_82598()
33 reg |= IXGBE_RMCS_RRM; in ixgbe_dcb_config_rx_arbiter_82598()
35 reg |= IXGBE_RMCS_DFP; in ixgbe_dcb_config_rx_arbiter_82598()
37 IXGBE_WRITE_REG(hw, IXGBE_RMCS, reg); in ixgbe_dcb_config_rx_arbiter_82598()
44 reg = credit_refill | (credit_max << IXGBE_RT2CR_MCL_SHIFT); in ixgbe_dcb_config_rx_arbiter_82598()
47 reg | in ixgbe_dcb_config_rx_arbiter_82598()
79 u32 reg, max_credits; ixgbe_dcb_config_tx_desc_arbiter_82598() local
125 u32 reg; ixgbe_dcb_config_tx_data_arbiter_82598() local
168 u32 fcrtl, reg; ixgbe_dcb_config_pfc_82598() local
221 u32 reg = 0; ixgbe_dcb_config_tc_stats_82598() local
[all...]
/linux/drivers/video/fbdev/riva/
H A Dnvreg.h44 #define DEVICE_ACCESS(device,reg) \ argument
45 nvCONTROL[(NV_##device##_##reg)/4]
47 #define DEVICE_WRITE(device,reg,value) DEVICE_ACCESS(device,reg)=(value) argument
48 #define DEVICE_READ(device,reg) DEVICE_ACCESS(device,reg) argument
49 #define DEVICE_PRINT(device,reg) \ argument
50 ErrorF("NV_"#device"_"#reg"=#%08lx\n",DEVICE_ACCESS(device,reg))
56 #define PDAC_Write(reg,valu argument
57 PDAC_Read(reg) global() argument
58 PDAC_Print(reg) global() argument
63 PFB_Write(reg,value) global() argument
64 PFB_Read(reg) global() argument
65 PFB_Print(reg) global() argument
70 PRM_Write(reg,value) global() argument
71 PRM_Read(reg) global() argument
72 PRM_Print(reg) global() argument
77 PGRAPH_Write(reg,value) global() argument
78 PGRAPH_Read(reg) global() argument
79 PGRAPH_Print(reg) global() argument
84 PDMA_Write(reg,value) global() argument
85 PDMA_Read(reg) global() argument
86 PDMA_Print(reg) global() argument
91 PTIMER_Write(reg,value) global() argument
92 PTIMER_Read(reg) global() argument
93 PTIMER_Print(reg) global() argument
98 PEXTDEV_Write(reg,value) global() argument
99 PEXTDEV_Read(reg) global() argument
100 PEXTDEV_Print(reg) global() argument
105 PFIFO_Write(reg,value) global() argument
106 PFIFO_Read(reg) global() argument
107 PFIFO_Print(reg) global() argument
112 PRAM_Write(reg,value) global() argument
113 PRAM_Read(reg) global() argument
114 PRAM_Print(reg) global() argument
119 PRAMFC_Write(reg,value) global() argument
120 PRAMFC_Read(reg) global() argument
121 PRAMFC_Print(reg) global() argument
126 PMC_Write(reg,value) global() argument
127 PMC_Read(reg) global() argument
128 PMC_Print(reg) global() argument
133 PMC_Write(reg,value) global() argument
134 PMC_Read(reg) global() argument
135 PMC_Print(reg) global() argument
141 PBUS_Write(reg,value) global() argument
142 PBUS_Read(reg) global() argument
143 PBUS_Print(reg) global() argument
149 PRAMDAC_Write(reg,value) global() argument
150 PRAMDAC_Read(reg) global() argument
151 PRAMDAC_Print(reg) global() argument
157 PDAC_ReadExt(reg) global() argument
162 PDAC_WriteExt(reg,value) global() argument
[all...]
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsoc15_common.h36 #define SOC15_REG_OFFSET(ip, inst, reg) (adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg) argument
37 #define SOC15_REG_OFFSET1(ip, inst, reg, offset) \ argument
38 (adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + (reg)+(offset))
40 #define __WREG32_SOC15_RLC__(reg, value, flag, hwip, inst) \ argument
42 amdgpu_sriov_wreg(adev, reg, value, flag, hwip, inst) : \
43 WREG32(reg, value))
45 #define __RREG32_SOC15_RLC__(reg, fla argument
50 WREG32_FIELD15(ip,idx,reg,field,val) global() argument
66 RREG32_SOC15(ip,inst,reg) global() argument
70 RREG32_SOC15_IP(ip,reg) global() argument
72 RREG32_SOC15_IP_NO_KIQ(ip,reg,inst) global() argument
74 RREG32_SOC15_NO_KIQ(ip,inst,reg) global() argument
78 RREG32_SOC15_OFFSET(ip,inst,reg,offset) global() argument
82 WREG32_SOC15(ip,inst,reg,value) global() argument
86 WREG32_SOC15_IP(ip,reg,value) global() argument
89 WREG32_SOC15_IP_NO_KIQ(ip,reg,value,inst) global() argument
92 WREG32_SOC15_NO_KIQ(ip,inst,reg,value) global() argument
96 WREG32_SOC15_OFFSET(ip,inst,reg,offset,value) global() argument
100 SOC15_WAIT_ON_RREG(ip,inst,reg,expected_value,mask) global() argument
105 SOC15_WAIT_ON_RREG_OFFSET(ip,inst,reg,offset,expected_value,mask) global() argument
110 WREG32_RLC(reg,value) global() argument
113 WREG32_RLC_EX(prefix,reg,value,inst) global() argument
138 WREG32_SOC15_RLC_SHADOW(ip,inst,reg,value) global() argument
142 RREG32_RLC(reg) global() argument
145 WREG32_RLC_NO_KIQ(reg,value,hwip) global() argument
148 RREG32_RLC_NO_KIQ(reg,hwip) global() argument
151 WREG32_SOC15_RLC_SHADOW_EX(prefix,ip,inst,reg,value) global() argument
169 RREG32_SOC15_RLC(ip,inst,reg) global() argument
172 WREG32_SOC15_RLC(ip,inst,reg,value) global() argument
178 WREG32_SOC15_RLC_EX(prefix,ip,inst,reg,value) global() argument
184 WREG32_FIELD15_RLC(ip,idx,reg,field,val) global() argument
191 WREG32_SOC15_OFFSET_RLC(ip,inst,reg,offset,value) global() argument
194 RREG32_SOC15_OFFSET_RLC(ip,inst,reg,offset) global() argument
198 RREG32_SOC15_EXT(ip,inst,reg,ext) global() argument
202 WREG32_SOC15_EXT(ip,inst,reg,ext,value) global() argument
[all...]
/linux/drivers/media/pci/cx23885/
H A Dcx23885-ioctl.c32 struct v4l2_dbg_register *reg) in cx23417_g_register() argument
39 if ((reg->reg & 0x3) != 0 || reg->reg >= 0x10000) in cx23417_g_register()
42 if (mc417_register_read(dev, (u16) reg->reg, &value)) in cx23417_g_register()
45 reg->size = 4; in cx23417_g_register()
46 reg->val = value; in cx23417_g_register()
51 struct v4l2_dbg_register *reg) in cx23885_g_register() argument
69 cx23417_s_register(struct cx23885_dev * dev,const struct v4l2_dbg_register * reg) cx23417_s_register() argument
83 cx23885_s_register(struct file * file,void * fh,const struct v4l2_dbg_register * reg) cx23885_s_register() argument
[all...]
/linux/drivers/media/platform/nxp/imx-jpeg/
H A Dmxc-jpeg-hw.c18 dev_dbg(dev, "Wrapper reg %s = 0x%x\n", reg_name, val);\
35 void print_cast_status(struct device *dev, void __iomem *reg, in print_cast_status() argument
39 print_wrapper_reg(dev, reg, CAST_STATUS0); in print_cast_status()
40 print_wrapper_reg(dev, reg, CAST_STATUS1); in print_cast_status()
41 print_wrapper_reg(dev, reg, CAST_STATUS2); in print_cast_status()
42 print_wrapper_reg(dev, reg, CAST_STATUS3); in print_cast_status()
43 print_wrapper_reg(dev, reg, CAST_STATUS4); in print_cast_status()
44 print_wrapper_reg(dev, reg, CAST_STATUS5); in print_cast_status()
45 print_wrapper_reg(dev, reg, CAST_STATUS6); in print_cast_status()
46 print_wrapper_reg(dev, reg, CAST_STATUS in print_cast_status()
63 print_wrapper_info(struct device * dev,void __iomem * reg) print_wrapper_info() argument
77 mxc_jpeg_enable_irq(void __iomem * reg,int slot) mxc_jpeg_enable_irq() argument
83 mxc_jpeg_disable_irq(void __iomem * reg,int slot) mxc_jpeg_disable_irq() argument
89 mxc_jpeg_sw_reset(void __iomem * reg) mxc_jpeg_sw_reset() argument
100 mxc_jpeg_enc_mode_conf(struct device * dev,void __iomem * reg,u8 extseq) mxc_jpeg_enc_mode_conf() argument
115 mxc_jpeg_enc_mode_go(struct device * dev,void __iomem * reg,u8 extseq) mxc_jpeg_enc_mode_go() argument
127 mxc_jpeg_enc_set_quality(struct device * dev,void __iomem * reg,u8 quality) mxc_jpeg_enc_set_quality() argument
135 mxc_jpeg_dec_mode_go(struct device * dev,void __iomem * reg) mxc_jpeg_dec_mode_go() argument
141 mxc_jpeg_enable(void __iomem * reg) mxc_jpeg_enable() argument
150 mxc_jpeg_enable_slot(void __iomem * reg,int slot) mxc_jpeg_enable_slot() argument
158 mxc_jpeg_set_l_endian(void __iomem * reg,int le) mxc_jpeg_set_l_endian() argument
182 mxc_jpeg_set_desc(u32 desc,void __iomem * reg,int slot) mxc_jpeg_set_desc() argument
188 mxc_jpeg_clr_desc(void __iomem * reg,int slot) mxc_jpeg_clr_desc() argument
[all...]
/linux/arch/mips/include/asm/octeon/
H A Dcvmx-fau.h123 * @reg: FAU atomic register to access. 0 <= reg < 2048.
129 static inline uint64_t __cvmx_fau_store_address(uint64_t noadd, uint64_t reg) in __cvmx_fau_store_address() argument
133 cvmx_build_bits(CVMX_FAU_BITS_REGISTER, reg); in __cvmx_fau_store_address()
143 * @reg: FAU atomic register to access. 0 <= reg < 2048.
152 static inline uint64_t __cvmx_fau_atomic_address(uint64_t tagwait, uint64_t reg, in __cvmx_fau_atomic_address() argument
158 cvmx_build_bits(CVMX_FAU_BITS_REGISTER, reg); in __cvmx_fau_atomic_address()
164 * @reg: FAU atomic register to access. 0 <= reg < 204
170 cvmx_fau_fetch_and_add64(cvmx_fau_reg_64_t reg,int64_t value) cvmx_fau_fetch_and_add64() argument
185 cvmx_fau_fetch_and_add32(cvmx_fau_reg_32_t reg,int32_t value) cvmx_fau_fetch_and_add32() argument
200 cvmx_fau_fetch_and_add16(cvmx_fau_reg_16_t reg,int16_t value) cvmx_fau_fetch_and_add16() argument
214 cvmx_fau_fetch_and_add8(cvmx_fau_reg_8_t reg,int8_t value) cvmx_fau_fetch_and_add8() argument
233 cvmx_fau_tagwait_fetch_and_add64(cvmx_fau_reg_64_t reg,int64_t value) cvmx_fau_tagwait_fetch_and_add64() argument
257 cvmx_fau_tagwait_fetch_and_add32(cvmx_fau_reg_32_t reg,int32_t value) cvmx_fau_tagwait_fetch_and_add32() argument
281 cvmx_fau_tagwait_fetch_and_add16(cvmx_fau_reg_16_t reg,int16_t value) cvmx_fau_tagwait_fetch_and_add16() argument
304 cvmx_fau_tagwait_fetch_and_add8(cvmx_fau_reg_8_t reg,int8_t value) cvmx_fau_tagwait_fetch_and_add8() argument
340 __cvmx_fau_iobdma_data(uint64_t scraddr,int64_t value,uint64_t tagwait,cvmx_fau_op_size_t size,uint64_t reg) __cvmx_fau_iobdma_data() argument
364 cvmx_fau_async_fetch_and_add64(uint64_t scraddr,cvmx_fau_reg_64_t reg,int64_t value) cvmx_fau_async_fetch_and_add64() argument
384 cvmx_fau_async_fetch_and_add32(uint64_t scraddr,cvmx_fau_reg_32_t reg,int32_t value) cvmx_fau_async_fetch_and_add32() argument
403 cvmx_fau_async_fetch_and_add16(uint64_t scraddr,cvmx_fau_reg_16_t reg,int16_t value) cvmx_fau_async_fetch_and_add16() argument
421 cvmx_fau_async_fetch_and_add8(uint64_t scraddr,cvmx_fau_reg_8_t reg,int8_t value) cvmx_fau_async_fetch_and_add8() argument
444 cvmx_fau_async_tagwait_fetch_and_add64(uint64_t scraddr,cvmx_fau_reg_64_t reg,int64_t value) cvmx_fau_async_tagwait_fetch_and_add64() argument
467 cvmx_fau_async_tagwait_fetch_and_add32(uint64_t scraddr,cvmx_fau_reg_32_t reg,int32_t value) cvmx_fau_async_tagwait_fetch_and_add32() argument
490 cvmx_fau_async_tagwait_fetch_and_add16(uint64_t scraddr,cvmx_fau_reg_16_t reg,int16_t value) cvmx_fau_async_tagwait_fetch_and_add16() argument
512 cvmx_fau_async_tagwait_fetch_and_add8(uint64_t scraddr,cvmx_fau_reg_8_t reg,int8_t value) cvmx_fau_async_tagwait_fetch_and_add8() argument
526 cvmx_fau_atomic_add64(cvmx_fau_reg_64_t reg,int64_t value) cvmx_fau_atomic_add64() argument
538 cvmx_fau_atomic_add32(cvmx_fau_reg_32_t reg,int32_t value) cvmx_fau_atomic_add32() argument
551 cvmx_fau_atomic_add16(cvmx_fau_reg_16_t reg,int16_t value) cvmx_fau_atomic_add16() argument
563 cvmx_fau_atomic_add8(cvmx_fau_reg_8_t reg,int8_t value) cvmx_fau_atomic_add8() argument
576 cvmx_fau_atomic_write64(cvmx_fau_reg_64_t reg,int64_t value) cvmx_fau_atomic_write64() argument
588 cvmx_fau_atomic_write32(cvmx_fau_reg_32_t reg,int32_t value) cvmx_fau_atomic_write32() argument
601 cvmx_fau_atomic_write16(cvmx_fau_reg_16_t reg,int16_t value) cvmx_fau_atomic_write16() argument
613 cvmx_fau_atomic_write8(cvmx_fau_reg_8_t reg,int8_t value) cvmx_fau_atomic_write8() argument
[all...]
/linux/drivers/acpi/pmic/
H A Dintel_pmic_bxtwc.c30 .reg = 0x63,
35 .reg = 0x65,
40 .reg = 0x67,
45 .reg = 0x6d,
50 .reg = 0x6f,
55 .reg = 0x70,
60 .reg = 0x71,
65 .reg = 0x72,
70 .reg = 0x73,
75 .reg
273 intel_bxtwc_pmic_get_power(struct regmap * regmap,int reg,int bit,u64 * value) intel_bxtwc_pmic_get_power() argument
285 intel_bxtwc_pmic_update_power(struct regmap * regmap,int reg,int bit,bool on) intel_bxtwc_pmic_update_power() argument
298 intel_bxtwc_pmic_get_raw_temp(struct regmap * regmap,int reg) intel_bxtwc_pmic_get_raw_temp() argument
324 intel_bxtwc_pmic_update_aux(struct regmap * regmap,int reg,int raw) intel_bxtwc_pmic_update_aux() argument
351 intel_bxtwc_pmic_get_policy(struct regmap * regmap,int reg,int bit,u64 * value) intel_bxtwc_pmic_get_policy() argument
365 intel_bxtwc_pmic_update_policy(struct regmap * regmap,int reg,int bit,int enable) intel_bxtwc_pmic_update_policy() argument
[all...]
/linux/drivers/net/wireless/ralink/rt2x00/
H A Drt2400pci.c48 u32 reg; in rt2400pci_bbp_write() local
56 if (WAIT_FOR_BBP(rt2x00dev, &reg)) { in rt2400pci_bbp_write()
57 reg = 0; in rt2400pci_bbp_write()
58 rt2x00_set_field32(&reg, BBPCSR_VALUE, value); in rt2400pci_bbp_write()
59 rt2x00_set_field32(&reg, BBPCSR_REGNUM, word); in rt2400pci_bbp_write()
60 rt2x00_set_field32(&reg, BBPCSR_BUSY, 1); in rt2400pci_bbp_write()
61 rt2x00_set_field32(&reg, BBPCSR_WRITE_CONTROL, 1); in rt2400pci_bbp_write()
63 rt2x00mmio_register_write(rt2x00dev, BBPCSR, reg); in rt2400pci_bbp_write()
72 u32 reg; in rt2400pci_bbp_read() local
82 * doesn't become available in time, reg wil in rt2400pci_bbp_read()
106 u32 reg; rt2400pci_rf_write() local
131 u32 reg; rt2400pci_eepromregister_read() local
146 u32 reg = 0; rt2400pci_eepromregister_write() local
195 u32 reg; rt2400pci_rfkill_poll() local
208 u32 reg; rt2400pci_brightness_set() local
226 u32 reg; rt2400pci_blink_set() local
254 u32 reg; rt2400pci_config_filter() local
283 u32 reg; rt2400pci_config_intf() local
317 u32 reg; rt2400pci_config_erp() local
501 u32 reg; rt2400pci_config_retry_limit() local
517 u32 reg; rt2400pci_config_ps() local
559 u32 reg; rt2400pci_config_cw() local
573 u32 reg; rt2400pci_link_stats() local
630 u32 reg; rt2400pci_start_queue() local
653 u32 reg; rt2400pci_kick_queue() local
679 u32 reg; rt2400pci_stop_queue() local
760 u32 reg; rt2400pci_init_queues() local
812 u32 reg; rt2400pci_init_registers() local
961 u32 reg; rt2400pci_toggle_irq() local
1024 u32 reg, reg2; rt2400pci_set_state() local
1169 u32 reg; rt2400pci_write_beacon() local
1307 u32 reg; rt2400pci_enable_interrupt() local
1326 u32 reg; rt2400pci_txstatus_tasklet() local
1372 u32 reg, mask; rt2400pci_interrupt() local
1433 u32 reg; rt2400pci_validate_eeprom() local
1469 u32 reg; rt2400pci_init_eeprom() local
1610 u32 reg; rt2400pci_probe_hw() local
1688 u32 reg; rt2400pci_get_tsf() local
1701 u32 reg; rt2400pci_tx_last_beacon() local
[all...]
/linux/drivers/gpu/drm/amd/display/dc/inc/
H A Dreg_helper.h37 * eg. aud110->regs->reg
67 #define REG_SET_2(reg, init_value, f1, v1, f2, v2) \ argument
68 REG_SET_N(reg, 2, init_value, \
69 FN(reg, f1), v1,\
70 FN(reg, f2), v2)
72 #define REG_SET_3(reg, init_value, f1, v1, f2, v2, f3, v3) \ argument
73 REG_SET_N(reg, 3, init_value, \
74 FN(reg, f1), v1,\
75 FN(reg, f2), v2,\
76 FN(reg, f
78 REG_SET_4(reg,init_value,f1,v1,f2,v2,f3,v3,f4,v4) global() argument
85 REG_SET_5(reg,init_value,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5) global() argument
94 REG_SET_6(reg,init_value,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) global() argument
104 REG_SET_7(reg,init_value,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7) global() argument
115 REG_SET_8(reg,init_value,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) global() argument
127 REG_SET_9(reg,init_value,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) global() argument
140 REG_SET_10(reg,init_value,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) global() argument
234 REG_UPDATE_2(reg,f1,v1,f2,v2) global() argument
239 REG_UPDATE_3(reg,f1,v1,f2,v2,f3,v3) global() argument
245 REG_UPDATE_4(reg,f1,v1,f2,v2,f3,v3,f4,v4) global() argument
252 REG_UPDATE_5(reg,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5) global() argument
260 REG_UPDATE_6(reg,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) global() argument
269 REG_UPDATE_7(reg,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7) global() argument
279 REG_UPDATE_8(reg,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) global() argument
290 REG_UPDATE_9(reg,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) global() argument
302 REG_UPDATE_10(reg,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) global() argument
315 REG_UPDATE_14(reg,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14) global() argument
333 REG_UPDATE_19(reg,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19) global() argument
356 REG_UPDATE_20(reg,f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20) global() argument
382 REG_UPDATE_SEQ_2(reg,f1,v1,f2,v2) global() argument
386 REG_UPDATE_SEQ_3(reg,f1,v1,f2,v2,f3,v3) global() argument
[all...]
/linux/drivers/net/ethernet/sfc/siena/
H A Dio.h78 static inline u32 efx_reg(struct efx_nic *efx, unsigned int reg) in efx_reg() argument
80 return efx->reg_base + reg; in efx_reg()
85 unsigned int reg) in _efx_writeq() argument
87 __raw_writeq((__force u64)value, efx->membase + reg); in _efx_writeq()
89 static inline __le64 _efx_readq(struct efx_nic *efx, unsigned int reg) in _efx_readq() argument
91 return (__force __le64)__raw_readq(efx->membase + reg); in _efx_readq()
96 unsigned int reg) in _efx_writed() argument
98 __raw_writel((__force u32)value, efx->membase + reg); in _efx_writed()
100 static inline __le32 _efx_readd(struct efx_nic *efx, unsigned int reg) in _efx_readd() argument
102 return (__force __le32)__raw_readl(efx->membase + reg); in _efx_readd()
107 efx_writeo(struct efx_nic * efx,const efx_oword_t * value,unsigned int reg) efx_writeo() argument
151 efx_writed(struct efx_nic * efx,const efx_dword_t * value,unsigned int reg) efx_writed() argument
163 efx_reado(struct efx_nic * efx,efx_oword_t * value,unsigned int reg) efx_reado() argument
202 efx_readd(struct efx_nic * efx,efx_dword_t * value,unsigned int reg) efx_readd() argument
213 efx_writeo_table(struct efx_nic * efx,const efx_oword_t * value,unsigned int reg,unsigned int index) efx_writeo_table() argument
220 efx_reado_table(struct efx_nic * efx,efx_oword_t * value,unsigned int reg,unsigned int index) efx_reado_table() argument
233 efx_paged_reg(struct efx_nic * efx,unsigned int page,unsigned int reg) efx_paged_reg() argument
240 _efx_writeo_page(struct efx_nic * efx,efx_oword_t * value,unsigned int reg,unsigned int page) _efx_writeo_page() argument
258 efx_writeo_page(efx,value,reg,page) global() argument
269 _efx_writed_page(struct efx_nic * efx,const efx_dword_t * value,unsigned int reg,unsigned int page) _efx_writed_page() argument
273 efx_writed_page(efx,value,reg,page) global() argument
292 _efx_writed_page_locked(struct efx_nic * efx,const efx_dword_t * value,unsigned int reg,unsigned int page) _efx_writed_page_locked() argument
305 efx_writed_page_locked(efx,value,reg,page) global() argument
[all...]
/linux/drivers/gpu/drm/i915/display/
H A Dintel_de.h21 intel_de_read(struct intel_display *display, i915_reg_t reg) in intel_de_read() argument
25 intel_dmc_wl_get(display, reg); in intel_de_read()
27 val = intel_uncore_read(__to_uncore(display), reg); in intel_de_read()
29 intel_dmc_wl_put(display, reg); in intel_de_read()
35 intel_de_read8(struct intel_display *display, i915_reg_t reg) in intel_de_read8() argument
39 intel_dmc_wl_get(display, reg); in intel_de_read8()
41 val = intel_uncore_read8(__to_uncore(display), reg); in intel_de_read8()
43 intel_dmc_wl_put(display, reg); in intel_de_read8()
67 intel_de_posting_read(struct intel_display *display, i915_reg_t reg) in intel_de_posting_read() argument
69 intel_dmc_wl_get(display, reg); in intel_de_posting_read()
77 intel_de_write(struct intel_display * display,i915_reg_t reg,u32 val) intel_de_write() argument
87 __intel_de_rmw_nowl(struct intel_display * display,i915_reg_t reg,u32 clear,u32 set) __intel_de_rmw_nowl() argument
94 intel_de_rmw(struct intel_display * display,i915_reg_t reg,u32 clear,u32 set) intel_de_rmw() argument
109 __intel_de_wait_for_register_nowl(struct intel_display * display,i915_reg_t reg,u32 mask,u32 value,unsigned int timeout_ms) __intel_de_wait_for_register_nowl() argument
118 __intel_de_wait_for_register_atomic_nowl(struct intel_display * display,i915_reg_t reg,u32 mask,u32 value,unsigned int fast_timeout_us) __intel_de_wait_for_register_atomic_nowl() argument
127 intel_de_wait(struct intel_display * display,i915_reg_t reg,u32 mask,u32 value,unsigned int timeout_ms) intel_de_wait() argument
143 intel_de_wait_fw(struct intel_display * display,i915_reg_t reg,u32 mask,u32 value,unsigned int timeout_ms,u32 * out_value) intel_de_wait_fw() argument
159 intel_de_wait_custom(struct intel_display * display,i915_reg_t reg,u32 mask,u32 value,unsigned int fast_timeout_us,unsigned int slow_timeout_ms,u32 * out_value) intel_de_wait_custom() argument
178 intel_de_wait_for_set(struct intel_display * display,i915_reg_t reg,u32 mask,unsigned int timeout_ms) intel_de_wait_for_set() argument
185 intel_de_wait_for_clear(struct intel_display * display,i915_reg_t reg,u32 mask,unsigned int timeout_ms) intel_de_wait_for_clear() argument
200 intel_de_read_fw(struct intel_display * display,i915_reg_t reg) intel_de_read_fw() argument
211 intel_de_write_fw(struct intel_display * display,i915_reg_t reg,u32 val) intel_de_write_fw() argument
218 intel_de_read_notrace(struct intel_display * display,i915_reg_t reg) intel_de_read_notrace() argument
224 intel_de_write_notrace(struct intel_display * display,i915_reg_t reg,u32 val) intel_de_write_notrace() argument
231 intel_de_write_dsb(struct intel_display * display,struct intel_dsb * dsb,i915_reg_t reg,u32 val) intel_de_write_dsb() argument
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