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Searched refs:pipe_config (Results 1 – 25 of 44) sorted by relevance

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/linux/drivers/gpu/drm/i915/display/
H A Dintel_crtc_state_dump.c35 const struct intel_crtc_state *pipe_config, in intel_dump_m_n_config() argument
176 void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config, in intel_crtc_state_dump() argument
180 struct intel_display *display = to_intel_display(pipe_config); in intel_crtc_state_dump()
181 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in intel_crtc_state_dump()
195 str_yes_no(pipe_config->hw.enable), context); in intel_crtc_state_dump()
197 if (!pipe_config->hw.enable) in intel_crtc_state_dump()
200 snprintf_output_types(buf, sizeof(buf), pipe_config->output_types); in intel_crtc_state_dump()
202 str_yes_no(pipe_config->hw.active), in intel_crtc_state_dump()
203 buf, pipe_config->output_types, in intel_crtc_state_dump()
204 intel_output_format_name(pipe_config in intel_crtc_state_dump()
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H A Dg4x_hdmi.c154 struct intel_crtc_state *pipe_config) in intel_hdmi_get_config() argument
161 pipe_config->output_types |= BIT(INTEL_OUTPUT_HDMI); in intel_hdmi_get_config()
176 pipe_config->has_hdmi_sink = true; in intel_hdmi_get_config()
178 pipe_config->infoframes.enable |= in intel_hdmi_get_config()
179 intel_hdmi_infoframes_enabled(encoder, pipe_config); in intel_hdmi_get_config()
181 if (pipe_config->infoframes.enable) in intel_hdmi_get_config()
182 pipe_config->has_infoframe = true; in intel_hdmi_get_config()
185 pipe_config->has_audio = true; in intel_hdmi_get_config()
189 pipe_config->limited_color_range = true; in intel_hdmi_get_config()
191 pipe_config in intel_hdmi_get_config()
221 g4x_hdmi_enable_port(struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config) g4x_hdmi_enable_port() argument
271 g4x_enable_hdmi(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state) g4x_enable_hdmi() argument
279 ibx_enable_hdmi(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state) ibx_enable_hdmi() argument
325 cpt_enable_hdmi(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state) cpt_enable_hdmi() argument
373 vlv_enable_hdmi(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state) vlv_enable_hdmi() argument
461 intel_hdmi_pre_enable(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state) intel_hdmi_pre_enable() argument
476 vlv_hdmi_pre_enable(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state) vlv_hdmi_pre_enable() argument
499 vlv_hdmi_pre_pll_enable(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state) vlv_hdmi_pre_pll_enable() argument
509 chv_hdmi_pre_pll_enable(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state) chv_hdmi_pre_pll_enable() argument
545 chv_hdmi_pre_enable(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state) chv_hdmi_pre_enable() argument
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H A Dg4x_dp.c62 struct intel_crtc_state *pipe_config) in g4x_dp_set_clock() argument
84 if (pipe_config->port_clock == divisor[i].dot) { in g4x_dp_set_clock()
85 pipe_config->dpll = divisor[i]; in g4x_dp_set_clock()
86 pipe_config->clock_set = true; in g4x_dp_set_clock()
94 const struct intel_crtc_state *pipe_config) in intel_dp_prepare() argument
99 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in intel_dp_prepare()
100 const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in intel_dp_prepare()
103 pipe_config->port_clock, in intel_dp_prepare()
104 pipe_config->lane_count); in intel_dp_prepare()
129 intel_dp->DP |= DP_PORT_WIDTH(pipe_config in intel_dp_prepare()
196 ilk_edp_pll_on(struct intel_dp * intel_dp,const struct intel_crtc_state * pipe_config) ilk_edp_pll_on() argument
337 intel_dp_get_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config) intel_dp_get_config() argument
666 intel_enable_dp(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state) intel_enable_dp() argument
707 g4x_enable_dp(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state) g4x_enable_dp() argument
716 vlv_enable_dp(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state) vlv_enable_dp() argument
724 g4x_pre_enable_dp(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state) g4x_pre_enable_dp() argument
739 vlv_pre_enable_dp(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state) vlv_pre_enable_dp() argument
749 vlv_dp_pre_pll_enable(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state) vlv_dp_pre_pll_enable() argument
759 chv_pre_enable_dp(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state) chv_pre_enable_dp() argument
772 chv_dp_pre_pll_enable(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state) chv_dp_pre_pll_enable() argument
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H A Dintel_dp_mst.c632 struct intel_crtc_state *pipe_config, in mst_stream_compute_config() argument
637 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in mst_stream_compute_config()
642 &pipe_config->hw.adjusted_mode; in mst_stream_compute_config()
648 if (pipe_config->fec_enable && in mst_stream_compute_config()
649 !intel_dp_supports_fec(intel_dp, connector, pipe_config)) in mst_stream_compute_config()
659 pipe_config->joiner_pipes = GENMASK(crtc->pipe + num_joined_pipes - 1, crtc->pipe); in mst_stream_compute_config()
661 pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; in mst_stream_compute_config()
662 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; in mst_stream_compute_config()
663 pipe_config->has_pch_encoder = false; in mst_stream_compute_config()
669 pipe_config, fals in mst_stream_compute_config()
1142 mst_stream_pre_pll_enable(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state) mst_stream_pre_pll_enable() argument
1189 mst_stream_pre_enable(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state) mst_stream_pre_enable() argument
1284 mst_stream_enable(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state) mst_stream_enable() argument
1362 mst_stream_get_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config) mst_stream_get_config() argument
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H A Dintel_dp.c1634 const struct intel_crtc_state *pipe_config) in intel_dp_source_supports_fec() argument
1643 !intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST)) in intel_dp_source_supports_fec()
1651 const struct intel_crtc_state *pipe_config) in intel_dp_supports_fec() argument
1653 return intel_dp_source_supports_fec(intel_dp, pipe_config) && in intel_dp_supports_fec()
1771 struct intel_crtc_state *pipe_config, in intel_dp_compute_link_config_wide() argument
1775 int bpp, i, lane_count, clock = intel_dp_mode_clock(pipe_config, conn_state); in intel_dp_compute_link_config_wide()
1781 int link_bpp = intel_dp_output_bpp(pipe_config->output_format, bpp); in intel_dp_compute_link_config_wide()
1800 pipe_config->lane_count = lane_count; in intel_dp_compute_link_config_wide()
1801 pipe_config->pipe_bpp = bpp; in intel_dp_compute_link_config_wide()
1802 pipe_config in intel_dp_compute_link_config_wide()
1970 dsc_compute_link_config(struct intel_dp * intel_dp,struct intel_crtc_state * pipe_config,struct drm_connector_state * conn_state,const struct link_config_limits * limits,int dsc_bpp_x16,int timeslots) dsc_compute_link_config() argument
2028 intel_dp_dsc_max_sink_compressed_bppx16(const struct intel_connector * connector,const struct intel_crtc_state * pipe_config,int bpc) intel_dp_dsc_max_sink_compressed_bppx16() argument
2053 intel_dp_dsc_sink_min_compressed_bpp(const struct intel_crtc_state * pipe_config) intel_dp_dsc_sink_min_compressed_bpp() argument
2071 intel_dp_dsc_sink_max_compressed_bpp(const struct intel_connector * connector,const struct intel_crtc_state * pipe_config,int bpc) intel_dp_dsc_sink_max_compressed_bpp() argument
2158 dsc_compute_compressed_bpp(struct intel_dp * intel_dp,struct intel_crtc_state * pipe_config,struct drm_connector_state * conn_state,const struct link_config_limits * limits,int pipe_bpp,int timeslots) dsc_compute_compressed_bpp() argument
2253 intel_dp_dsc_compute_pipe_bpp(struct intel_dp * intel_dp,struct intel_crtc_state * pipe_config,struct drm_connector_state * conn_state,const struct link_config_limits * limits,int timeslots) intel_dp_dsc_compute_pipe_bpp() argument
2297 intel_edp_dsc_compute_pipe_bpp(struct intel_dp * intel_dp,struct intel_crtc_state * pipe_config,struct drm_connector_state * conn_state,const struct link_config_limits * limits) intel_edp_dsc_compute_pipe_bpp() argument
2362 intel_dp_dsc_compute_config(struct intel_dp * intel_dp,struct intel_crtc_state * pipe_config,struct drm_connector_state * conn_state,const struct link_config_limits * limits,int timeslots) intel_dp_dsc_compute_config() argument
2624 intel_dp_compute_link_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config,struct drm_connector_state * conn_state,bool respect_downstream_limits) intel_dp_compute_link_config() argument
2944 can_enable_drrs(struct intel_connector * connector,const struct intel_crtc_state * pipe_config,const struct drm_display_mode * downclock_mode) can_enable_drrs() argument
2974 intel_dp_drrs_compute_config(struct intel_connector * connector,struct intel_crtc_state * pipe_config,int link_bpp_x16) intel_dp_drrs_compute_config() argument
3079 intel_dp_audio_compute_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config,struct drm_connector_state * conn_state) intel_dp_audio_compute_config() argument
3192 intel_dp_compute_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config,struct drm_connector_state * conn_state) intel_dp_compute_config() argument
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H A Dintel_dvo.c162 struct intel_crtc_state *pipe_config) in intel_dvo_get_config() argument
168 pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO); in intel_dvo_get_config()
180 pipe_config->hw.adjusted_mode.flags |= flags; in intel_dvo_get_config()
182 pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock; in intel_dvo_get_config()
202 const struct intel_crtc_state *pipe_config, in intel_enable_dvo() argument
210 &pipe_config->hw.mode, in intel_enable_dvo()
211 &pipe_config->hw.adjusted_mode); in intel_enable_dvo()
255 struct intel_crtc_state *pipe_config, in intel_dvo_compute_config() argument
260 struct drm_display_mode *adjusted_mode = &pipe_config in intel_dvo_compute_config()
289 intel_dvo_pre_enable(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state) intel_dvo_pre_enable() argument
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H A Dicl_dsi.c283 const struct intel_crtc_state *pipe_config) in configure_dual_link_mode() argument
292 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in configure_dual_link_mode()
308 &pipe_config->hw.adjusted_mode; in configure_dual_link_mode()
687 const struct intel_crtc_state *pipe_config) in gen11_dsi_configure_transcoder() argument
691 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in gen11_dsi_configure_transcoder()
707 if (afe_clk(encoder, pipe_config) >= 1500 * 1000) { in gen11_dsi_configure_transcoder()
733 if (pipe_config->dsc.compression_enable) { in gen11_dsi_configure_transcoder()
801 configure_dual_link_mode(encoder, pipe_config); in gen11_dsi_configure_transcoder()
1201 const struct intel_crtc_state *pipe_config, in gen11_dsi_pre_enable() argument
1205 gen11_dsi_map_pll(encoder, pipe_config); in gen11_dsi_pre_enable()
1478 gen11_dsi_get_timings(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config) gen11_dsi_get_timings() argument
1532 gen11_dsi_get_cmd_mode_config(struct intel_dsi * intel_dsi,struct intel_crtc_state * pipe_config) gen11_dsi_get_cmd_mode_config() argument
1544 gen11_dsi_get_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config) gen11_dsi_get_config() argument
1639 gen11_dsi_compute_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config,struct drm_connector_state * conn_state) gen11_dsi_compute_config() argument
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H A Dintel_display.c2835 struct intel_crtc_state *pipe_config) in intel_get_transcoder_timings() argument
2838 enum transcoder cpu_transcoder = pipe_config->cpu_transcoder; in intel_get_transcoder_timings()
2839 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in intel_get_transcoder_timings()
2872 if (intel_pipe_is_interlaced(pipe_config)) { in intel_get_transcoder_timings()
2885 pipe_config->min_hblank = intel_de_read(display, in intel_get_transcoder_timings()
2907 struct intel_crtc_state *pipe_config) in intel_get_pipe_src_size() argument
2914 drm_rect_init(&pipe_config->pipe_src, 0, 0, in intel_get_pipe_src_size()
2918 intel_joiner_adjust_pipe_src(pipe_config); in intel_get_pipe_src_size()
3015 struct intel_crtc_state *pipe_config) in i9xx_get_pipe_config() argument
3033 pipe_config in i9xx_get_pipe_config()
3357 ilk_get_pipe_config(struct intel_crtc * crtc,struct intel_crtc_state * pipe_config) ilk_get_pipe_config() argument
3826 hsw_get_transcoder_state(struct intel_crtc * crtc,struct intel_crtc_state * pipe_config,struct intel_display_power_domain_set * power_domain_set) hsw_get_transcoder_state() argument
3865 bxt_get_dsi_transcoder_state(struct intel_crtc * crtc,struct intel_crtc_state * pipe_config,struct intel_display_power_domain_set * power_domain_set) bxt_get_dsi_transcoder_state() argument
3925 hsw_get_pipe_config(struct intel_crtc * crtc,struct intel_crtc_state * pipe_config) hsw_get_pipe_config() argument
4053 intel_crtc_dotclock(const struct intel_crtc_state * pipe_config) intel_crtc_dotclock() argument
5000 intel_pipe_config_compare(const struct intel_crtc_state * current_config,const struct intel_crtc_state * pipe_config,bool fastset) intel_pipe_config_compare() argument
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H A Dvlv_dsi.c271 struct intel_crtc_state *pipe_config, in intel_dsi_compute_config() argument
277 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in intel_dsi_compute_config()
281 pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; in intel_dsi_compute_config()
282 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; in intel_dsi_compute_config()
288 ret = intel_pfit_compute_config(pipe_config, conn_state); in intel_dsi_compute_config()
299 pipe_config->pipe_bpp = 24; in intel_dsi_compute_config()
301 pipe_config->pipe_bpp = 18; in intel_dsi_compute_config()
305 pipe_config->mode_flags |= in intel_dsi_compute_config()
310 pipe_config->cpu_transcoder = TRANSCODER_DSI_C; in intel_dsi_compute_config()
312 pipe_config in intel_dsi_compute_config()
725 intel_dsi_pre_enable(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state) intel_dsi_pre_enable() argument
1011 bxt_dsi_get_pipe_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config) bxt_dsi_get_pipe_config() argument
1176 intel_dsi_get_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config) intel_dsi_get_config() argument
1304 intel_dsi_prepare(struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config) intel_dsi_prepare() argument
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H A Dintel_fdi.c186 struct intel_crtc_state *pipe_config, in ilk_check_fdi_lanes() argument
189 struct drm_atomic_state *state = pipe_config->uapi.state; in ilk_check_fdi_lanes()
197 pipe_name(pipe), pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
198 if (pipe_config->fdi_lanes > 4) { in ilk_check_fdi_lanes()
201 pipe_name(pipe), pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
206 if (pipe_config->fdi_lanes > 2) { in ilk_check_fdi_lanes()
209 pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
224 if (pipe_config->fdi_lanes <= 2) in ilk_check_fdi_lanes()
236 pipe_name(pipe), pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
241 if (pipe_config in ilk_check_fdi_lanes()
287 intel_fdi_link_freq(struct intel_display * display,const struct intel_crtc_state * pipe_config) intel_fdi_link_freq() argument
324 ilk_fdi_compute_config(struct intel_crtc * crtc,struct intel_crtc_state * pipe_config) ilk_fdi_compute_config() argument
357 intel_fdi_atomic_check_bw(struct intel_atomic_state * state,struct intel_crtc * crtc,struct intel_crtc_state * pipe_config,struct intel_link_bw_limits * limits) intel_fdi_atomic_check_bw() argument
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H A Dintel_dp.h73 struct intel_crtc_state *pipe_config,
76 struct intel_crtc_state *pipe_config,
81 struct intel_crtc_state *pipe_config,
146 int intel_dp_dsc_sink_min_compressed_bpp(const struct intel_crtc_state *pipe_config);
148 const struct intel_crtc_state *pipe_config,
165 const struct intel_crtc_state *pipe_config);
171 const struct intel_crtc_state *pipe_config);
H A Dintel_pipe_crc.c285 struct intel_crtc_state *pipe_config; in intel_crtc_crc_setup_workarounds() local
305 pipe_config = intel_atomic_get_crtc_state(state, crtc); in intel_crtc_crc_setup_workarounds()
306 if (IS_ERR(pipe_config)) { in intel_crtc_crc_setup_workarounds()
307 ret = PTR_ERR(pipe_config); in intel_crtc_crc_setup_workarounds()
311 pipe_config->uapi.mode_changed = pipe_config->has_psr; in intel_crtc_crc_setup_workarounds()
312 pipe_config->crc_enabled = enable; in intel_crtc_crc_setup_workarounds()
315 pipe_config->hw.active && crtc->pipe == PIPE_A && in intel_crtc_crc_setup_workarounds()
316 pipe_config->cpu_transcoder == TRANSCODER_EDP) in intel_crtc_crc_setup_workarounds()
317 pipe_config in intel_crtc_crc_setup_workarounds()
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H A Dintel_tv.c929 const struct intel_crtc_state *pipe_config, in intel_enable_tv() argument
935 intel_crtc_wait_for_next_vblank(to_intel_crtc(pipe_config->uapi.crtc)); in intel_enable_tv()
1092 struct intel_crtc_state *pipe_config) in intel_tv_get_config() argument
1096 &pipe_config->hw.adjusted_mode; in intel_tv_get_config()
1104 pipe_config->output_types |= BIT(INTEL_OUTPUT_TVOUT); in intel_tv_get_config()
1126 tv_mode.clock = pipe_config->port_clock; in intel_tv_get_config()
1153 intel_tv_mode_to_mode(&mode, &tv_mode, pipe_config->port_clock); in intel_tv_get_config()
1169 pipe_config->mode_flags |= in intel_tv_get_config()
1191 struct intel_crtc_state *pipe_config, in intel_tv_compute_config() argument
1196 to_intel_atomic_state(pipe_config in intel_tv_compute_config()
1434 intel_tv_pre_enable(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state) intel_tv_pre_enable() argument
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H A Dintel_ddi.c406 static void ddi_dotclock_get(struct intel_crtc_state *pipe_config) in ddi_dotclock_get() argument
409 if (pipe_config->has_pch_encoder) in ddi_dotclock_get()
412 pipe_config->hw.adjusted_mode.crtc_clock = in ddi_dotclock_get()
413 intel_crtc_dotclock(pipe_config); in ddi_dotclock_get()
2496 struct intel_crtc_state *pipe_config) in intel_ddi_mso_get_config() argument
2498 struct intel_display *display = to_intel_display(pipe_config); in intel_ddi_mso_get_config()
2499 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in intel_ddi_mso_get_config()
2508 pipe_config->splitter.enable = dss1 & SPLITTER_ENABLE; in intel_ddi_mso_get_config()
2509 if (!pipe_config->splitter.enable) in intel_ddi_mso_get_config()
2513 pipe_config in intel_ddi_mso_get_config()
4097 intel_ddi_read_func_ctl(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config) intel_ddi_read_func_ctl() argument
4164 intel_ddi_get_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config) intel_ddi_get_config() argument
4432 intel_ddi_compute_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config,struct drm_connector_state * conn_state) intel_ddi_compute_config() argument
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H A Dintel_sdvo.c1282 static int i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config) in i9xx_adjust_sdvo_tv_clock() argument
1284 struct intel_display *display = to_intel_display(pipe_config); in i9xx_adjust_sdvo_tv_clock()
1285 unsigned int dotclock = pipe_config->hw.adjusted_mode.crtc_clock; in i9xx_adjust_sdvo_tv_clock()
1286 struct dpll *clock = &pipe_config->dpll; in i9xx_adjust_sdvo_tv_clock()
1310 pipe_config->clock_set = true; in i9xx_adjust_sdvo_tv_clock()
1358 struct intel_crtc_state *pipe_config, in intel_sdvo_compute_config() argument
1365 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in intel_sdvo_compute_config()
1366 struct drm_display_mode *mode = &pipe_config->hw.mode; in intel_sdvo_compute_config()
1369 pipe_config->has_pch_encoder = true; in intel_sdvo_compute_config()
1370 if (!intel_fdi_compute_pipe_bpp(pipe_config)) in intel_sdvo_compute_config()
1701 intel_sdvo_get_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config) intel_sdvo_get_config() argument
1897 intel_enable_sdvo(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state) intel_enable_sdvo() argument
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H A Dintel_hdmi.c263 const struct intel_crtc_state *pipe_config) in g4x_infoframes_enabled() argument
335 const struct intel_crtc_state *pipe_config) in ibx_infoframes_enabled() argument
338 enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe; in ibx_infoframes_enabled()
413 const struct intel_crtc_state *pipe_config) in cpt_infoframes_enabled() argument
416 enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe; in cpt_infoframes_enabled()
486 const struct intel_crtc_state *pipe_config) in vlv_infoframes_enabled() argument
489 enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe; in vlv_infoframes_enabled()
562 const struct intel_crtc_state *pipe_config) in hsw_infoframes_enabled() argument
566 HSW_TVIDEO_DIP_CTL(display, pipe_config->cpu_transcoder)); in hsw_infoframes_enabled()
2320 struct intel_crtc_state *pipe_config, in intel_hdmi_compute_config() argument
[all...]
H A Dintel_lspcon.h22 const struct intel_crtc_state *pipe_config);
38 const struct intel_crtc_state *pipe_config);
H A Dintel_fdi.h22 const struct intel_crtc_state *pipe_config);
25 struct intel_crtc_state *pipe_config);
H A Dintel_dp_test.h17 struct intel_crtc_state *pipe_config,
H A Dintel_hdcp.h33 const struct intel_crtc_state *pipe_config,
H A Dintel_lspcon.c636 const struct intel_crtc_state *pipe_config) in lspcon_infoframes_enabled() argument
655 HSW_TVIDEO_DIP_CTL(display, pipe_config->cpu_transcoder)); in lspcon_infoframes_enabled()
711 const struct intel_crtc_state *pipe_config) in intel_lspcon_infoframes_enabled() argument
715 return dig_port->infoframes_enabled(encoder, pipe_config); in intel_lspcon_infoframes_enabled()
H A Dintel_hdmi.h30 struct intel_crtc_state *pipe_config,
/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc_dmub_srv.c602 pipe_data->pipe_config.vblank_data.drr_info.drr_in_use = true; in populate_subvp_cmd_drr_info()
603 pipe_data->pipe_config.vblank_data.drr_info.use_ramping = false; // for now don't use ramping in populate_subvp_cmd_drr_info()
604 pipe_data->pipe_config.vblank_data.drr_info.drr_window_size_ms = 4; // hardcode 4ms DRR window for now in populate_subvp_cmd_drr_info()
635 pipe_data->pipe_config.vblank_data.drr_info.min_vtotal_supported = min_vtotal_supported; in populate_subvp_cmd_drr_info()
636 pipe_data->pipe_config.vblank_data.drr_info.max_vtotal_supported = max_vtotal_supported; in populate_subvp_cmd_drr_info()
637 pipe_data->pipe_config.vblank_data.drr_info.drr_vblank_start_margin = dc->caps.subvp_drr_vblank_start_margin_us; in populate_subvp_cmd_drr_info()
681 pipe_data->pipe_config.vblank_data.pix_clk_100hz = vblank_pipe->stream->timing.pix_clk_100hz; in populate_subvp_cmd_vblank_pipe_info()
682 pipe_data->pipe_config.vblank_data.vblank_start = vblank_pipe->stream->timing.v_total - in populate_subvp_cmd_vblank_pipe_info()
684 pipe_data->pipe_config.vblank_data.vtotal = vblank_pipe->stream->timing.v_total; in populate_subvp_cmd_vblank_pipe_info()
685 pipe_data->pipe_config in populate_subvp_cmd_vblank_pipe_info()
[all...]
/linux/drivers/usb/renesas_usbhs/
H A Dpipe.c477 struct renesas_usbhs_driver_pipe_config *pipe_config = in usbhsp_setup_pipebuff() local
489 buff_size = pipe_config->bufsize; in usbhsp_setup_pipebuff()
490 bufnmb = pipe_config->bufnum; in usbhsp_setup_pipebuff()
507 struct renesas_usbhs_driver_pipe_config *pipe_config = in usbhs_pipe_config_update() local
509 u16 dblb = pipe_config->double_buf ? DBLB : 0; in usbhs_pipe_config_update()
/linux/drivers/staging/media/atomisp/pci/
H A Dia_css_pipe_public.h190 * @param[out] pipe_config The pipe configuration.
218 void ia_css_pipe_config_defaults(struct ia_css_pipe_config *pipe_config);

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