H A D | gaudi2.c | 5949 static int gaudi2_mmu_init_common(struct hl_device *hdev, u32 mmu_base, u32 stlb_base, in gaudi2_mmu_init_common() argument 5977 WREG32(mmu_base + MMU_BYPASS_OFFSET, 0); in gaudi2_mmu_init_common() 5990 WREG32(mmu_base + MMU_ENABLE_OFFSET, 1); in gaudi2_mmu_init_common() 5999 u32 mmu_base, stlb_base; in gaudi2_pci_mmu_init() local 6005 mmu_base = mmPMMU_HBW_MMU_BASE; in gaudi2_pci_mmu_init() 6024 RMWREG32_SHIFTED(mmu_base + MMU_STATIC_MULTI_PAGE_SIZE_OFFSET, in gaudi2_pci_mmu_init() 6035 WREG32(mmu_base + MMU_SPI_SEI_MASK_OFFSET, GAUDI2_PMMU_SPI_SEI_ENABLE_MASK); in gaudi2_pci_mmu_init() 6037 rc = gaudi2_mmu_init_common(hdev, mmu_base, stlb_base, prop->pmmu.host_resident); in gaudi2_pci_mmu_init() 6051 u32 offset, mmu_base, stlb_base, hw_cap; in gaudi2_dcore_hmmu_init() local 6066 mmu_base in gaudi2_dcore_hmmu_init() 8996 gaudi2_handle_page_error(struct hl_device * hdev,u64 mmu_base,bool is_pmmu,u64 * event_mask) gaudi2_handle_page_error() argument 9026 gaudi2_handle_access_error(struct hl_device * hdev,u64 mmu_base,bool is_pmmu) gaudi2_handle_access_error() argument 9050 gaudi2_handle_mmu_spi_sei_generic(struct hl_device * hdev,u16 event_type,u64 mmu_base,bool is_pmmu,u64 * event_mask) gaudi2_handle_mmu_spi_sei_generic() argument 9234 u64 mmu_base; gaudi2_handle_mmu_spi_sei_err() local 11287 gaudi2_get_mmu_base(struct hl_device * hdev,u64 mmu_id,u32 * mmu_base) gaudi2_get_mmu_base() argument 11352 u32 mmu_base; gaudi2_ack_mmu_error() local [all...] |