Searched refs:cntr_ctrl (Results 1 – 5 of 5) sorted by relevance
124 CHECKREGIDX(TRCCNTCTLRn(0), cntr_ctrl, idx, off_mask); in etm4_cfg_map_reg_offset()
236 config->cntr_ctrl[i] = 0x0; in reset_store() 1633 val = config->cntr_ctrl[idx]; in cntr_ctrl_show() 1652 config->cntr_ctrl[idx] = val; in cntr_ctrl_store() 1656 static DEVICE_ATTR_RW(cntr_ctrl);
534 etm4x_relaxed_write32(csa, config->cntr_ctrl[i], TRCCNTCTLRn(i)); in etm4_enable_hw() 667 config->cntr_ctrl[ctridx] = val; in etm4_config_timestamp_event()
796 * @cntr_ctrl: Controls the operation of a counter.840 u32 cntr_ctrl[ETMv4_MAX_CNTR]; member
356 :File: ``cntr_ctrl`` (rw)363 ``echo val > cntr_ctrl``