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Searched refs:clock_type (Results 1 – 25 of 57) sorted by relevance

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/linux/drivers/staging/sm750fb/
H A Dddk750_chip.h34 enum clock_type { enum
43 enum clock_type clock_type; member
H A Dddk750_mode.c84 if (pll->clock_type == SECONDARY_PLL) { in program_mode_registers()
137 } else if (pll->clock_type == PRIMARY_PLL) { in program_mode_registers()
206 int ddk750_set_mode_timing(struct mode_parameter *parm, enum clock_type clock) in ddk750_set_mode_timing()
211 pll.clock_type = clock; in ddk750_set_mode_timing()
H A Dddk750_mode.h36 int ddk750_set_mode_timing(struct mode_parameter *parm, enum clock_type clock);
H A Dddk750_chip.c69 pll.clock_type = MXCLK_PLL; in set_chip_clock()
345 if (pll->clock_type == MXCLK_PLL) in sm750_calc_pll_value()
/linux/drivers/nfc/fdp/
H A Di2c.c218 u8 *clock_type, u32 *clock_freq, in fdp_nci_i2c_read_device_properties() argument
224 r = device_property_read_u8(dev, FDP_DP_CLOCK_TYPE_NAME, clock_type); in fdp_nci_i2c_read_device_properties()
227 *clock_type = 0; in fdp_nci_i2c_read_device_properties()
268 *clock_type, *clock_freq, *fw_vsc_cfg != NULL ? "yes" : "no"); in fdp_nci_i2c_read_device_properties()
283 u8 clock_type; in fdp_nci_i2c_probe() local
328 fdp_nci_i2c_read_device_properties(dev, &clock_type, &clock_freq, in fdp_nci_i2c_probe()
334 clock_type, clock_freq, fw_vsc_cfg); in fdp_nci_i2c_probe()
H A Dfdp.c56 u8 clock_type; member
119 static int fdp_nci_set_clock(struct nci_dev *ndev, u8 clock_type, in fdp_nci_set_clock() argument
139 data[8] = clock_type; in fdp_nci_set_clock()
547 r = fdp_nci_set_clock(ndev, info->clock_type, info->clock_freq); in fdp_nci_post_setup()
701 int tx_tailroom, u8 clock_type, u32 clock_freq, in fdp_nci_probe() argument
716 info->clock_type = clock_type; in fdp_nci_probe()
H A Dfdp.h26 u8 clock_type, u32 clock_freq, const u8 *fw_vsc_cfg);
/linux/tools/testing/selftests/timers/
H A Dinconsistency-check.c83 int consistency_test(int clock_type, unsigned long seconds) in consistency_test() argument
91 clock_gettime(clock_type, &list[0]); in consistency_test()
103 clock_gettime(clock_type, &list[i]); in consistency_test()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/
H A Ddce112_clk_mgr.c87 dce_clk_params.clock_type = DCECLOCK_TYPE_DISPLAY_CLOCK; in dce112_set_clock()
102 dce_clk_params.clock_type = DCECLOCK_TYPE_DPREFCLK; in dce112_set_clock()
141 dce_clk_params.clock_type = DCECLOCK_TYPE_DISPLAY_CLOCK; in dce112_set_dispclk()
176 dce_clk_params.clock_type = DCECLOCK_TYPE_DPREFCLK; in dce112_set_dprefclk()
/linux/include/uapi/linux/hdlc/
H A Dioctl.h42 unsigned int clock_type; /* internal, external, TX-internal etc. */ member
48 unsigned int clock_type; /* internal, external, TX-internal etc. */ member
/linux/drivers/net/wan/
H A Dpci200syn.c119 switch (port->settings.clock_type) { in pci200_set_iface()
208 if (new_line.clock_type != CLOCK_EXT && in pci200_ioctl()
209 new_line.clock_type != CLOCK_TXFROMRX && in pci200_ioctl()
210 new_line.clock_type != CLOCK_INT && in pci200_ioctl()
211 new_line.clock_type != CLOCK_TXINT) in pci200_ioctl()
382 port->settings.clock_type = CLOCK_EXT; in pci200_pci_init_one()
H A Dc101.c146 switch (port->settings.clock_type) { in c101_set_iface()
256 if (new_line.clock_type != CLOCK_EXT && in c101_ioctl()
257 new_line.clock_type != CLOCK_TXFROMRX && in c101_ioctl()
258 new_line.clock_type != CLOCK_INT && in c101_ioctl()
259 new_line.clock_type != CLOCK_TXINT) in c101_ioctl()
369 card->settings.clock_type = CLOCK_EXT; in c101_run()
H A Dpc300too.c119 switch (port->settings.clock_type) { in pc300_set_iface()
231 if (new_line.clock_type != CLOCK_EXT && in pc300_ioctl()
232 new_line.clock_type != CLOCK_TXFROMRX && in pc300_ioctl()
233 new_line.clock_type != CLOCK_INT && in pc300_ioctl()
234 new_line.clock_type != CLOCK_TXINT) in pc300_ioctl()
443 port->settings.clock_type = CLOCK_EXT; in pc300_pci_init_one()
H A Dn2.c161 switch (port->settings.clock_type) { in n2_set_iface()
267 if (new_line.clock_type != CLOCK_EXT && in n2_ioctl()
268 new_line.clock_type != CLOCK_TXFROMRX && in n2_ioctl()
269 new_line.clock_type != CLOCK_INT && in n2_ioctl()
270 new_line.clock_type != CLOCK_TXINT) in n2_ioctl()
456 port->settings.clock_type = CLOCK_EXT; in n2_run()
H A Dfsl_qmc_hdlc.c160 switch (te1->clock_type) { in qmc_hdlc_framer_set_iface()
165 config.clock_type = FRAMER_CLOCK_EXT; in qmc_hdlc_framer_set_iface()
168 config.clock_type = FRAMER_CLOCK_INT; in qmc_hdlc_framer_set_iface()
204 switch (config.clock_type) { in qmc_hdlc_framer_get_iface()
206 te1->clock_type = CLOCK_EXT; in qmc_hdlc_framer_get_iface()
209 te1->clock_type = CLOCK_INT; in qmc_hdlc_framer_get_iface()
H A Dixp4xx_hss.c278 unsigned int clock_type, clock_rate, loopback; member
408 if (port->clock_type == CLOCK_INT) in hss_config()
1292 static int hss_hdlc_set_clock(struct port *port, unsigned int clock_type) in hss_hdlc_set_clock() argument
1294 switch (clock_type) { in hss_hdlc_set_clock()
1324 new_line.clock_type = port->clock_type; in hss_hdlc_ioctl()
1338 clk = new_line.clock_type; in hss_hdlc_ioctl()
1347 port->clock_type = clk; /* Update settings */ in hss_hdlc_ioctl()
1502 port->clock_type = CLOCK_EXT; in ixp4xx_hss_probe()
H A Dwanxl.c58 unsigned int clock_type; member
360 line.clock_type = get_status(port)->clocking; in wanxl_ioctl()
378 if (line.clock_type != CLOCK_EXT && in wanxl_ioctl()
379 line.clock_type != CLOCK_TXFROMRX) in wanxl_ioctl()
385 get_status(port)->clocking = line.clock_type; in wanxl_ioctl()
/linux/drivers/virtio/
H A Dvirtio_rtc_driver.c924 * @clock_type: virtio_rtc clock type
934 u16 vio_clk_id, u8 clock_type, u8 flags) in viortc_init_rtc_class_clock() argument
941 if (clock_type != VIRTIO_RTC_CLOCK_UTC_SMEARED) { in viortc_init_rtc_class_clock()
973 * @clock_type: virtio_rtc clock type
981 u8 clock_type, u8 leap_second_smearing) in viortc_init_ptp_clock() argument
988 "Virtio PTP type %hhu/variant %hhu", clock_type, in viortc_init_ptp_clock()
1015 u8 clock_type, leap_second_smearing, flags; in viortc_init_clock() local
1019 ret = viortc_clock_cap(viortc, vio_clk_id, &clock_type, in viortc_init_clock()
1025 (clock_type == VIRTIO_RTC_CLOCK_UTC || in viortc_init_clock()
1026 clock_type in viortc_init_clock()
[all...]
/linux/tools/testing/selftests/cgroup/
H A Dtest_cpu.c33 enum hog_clock_type clock_type; member
161 if (param->clock_type == CPU_HOG_CLOCK_PROCESS) { in hog_cpus_timed()
212 .clock_type = CPU_HOG_CLOCK_PROCESS, in test_cpucg_stats()
276 .clock_type = CPU_HOG_CLOCK_PROCESS, in test_cpucg_nice()
385 .clock_type = CPU_HOG_CLOCK_WALL, in weight_hog_ncpus()
547 .clock_type = CPU_HOG_CLOCK_WALL, in run_cpucg_nested_weight_test()
676 .clock_type = CPU_HOG_CLOCK_WALL, in test_cpucg_max()
747 .clock_type = CPU_HOG_CLOCK_WALL, in test_cpucg_max_nested()
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_pp_smu.c434 pp_clock_request.clock_type = dc_to_pp_clock_type(clock_for_voltage_req->clk_type); in dm_pp_apply_clock_for_voltage_request()
437 if (!pp_clock_request.clock_type) in dm_pp_apply_clock_for_voltage_request()
605 clock_req.clock_type = amd_pp_dcef_clock; in pp_nv_set_hard_min_dcefclk_by_freq()
628 clock_req.clock_type = amd_pp_mem_clock; in pp_nv_set_hard_min_uclk_by_freq()
666 clock_req.clock_type = amd_pp_disp_clock; in pp_nv_set_voltage_by_freq()
669 clock_req.clock_type = amd_pp_phy_clock; in pp_nv_set_voltage_by_freq()
672 clock_req.clock_type = amd_pp_pixel_clock; in pp_nv_set_voltage_by_freq()
/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_atombios.h156 u8 clock_type,
204 u8 clock_type,
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
H A Ddcn20_clk_mgr.h50 enum dc_clock_type clock_type,
/linux/sound/pci/pcxhr/
H A Dpcxhr_mix22.h19 enum pcxhr_clock_type clock_type,
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
H A Ddcn10_hwseq.h190 enum dc_clock_type clock_type,
194 enum dc_clock_type clock_type,
/linux/arch/x86/platform/uv/
H A Dbios_uv.c151 s64 uv_bios_freq_base(u64 clock_type, u64 *ticks_per_second) in uv_bios_freq_base() argument
153 return uv_bios_call(UV_BIOS_FREQ_BASE, clock_type, in uv_bios_freq_base()

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