| /linux/drivers/mtd/nand/raw/ |
| H A D | omap2.c | 61 #define TF(value) (value ? 1 : 0) macro
63 #define P2048e(a) (TF(a & NAND_Ecc_P2048e) << 0)
64 #define P2048o(a) (TF(a & NAND_Ecc_P2048o) << 1)
65 #define P1e(a) (TF(a & NAND_Ecc_P1e) << 2)
66 #define P1o(a) (TF(a & NAND_Ecc_P1o) << 3)
67 #define P2e(a) (TF(a & NAND_Ecc_P2e) << 4)
68 #define P2o(a) (TF(a & NAND_Ecc_P2o) << 5)
69 #define P4e(a) (TF(a & NAND_Ecc_P4e) << 6)
70 #define P4o(a) (TF(a & NAND_Ecc_P4o) << 7)
72 #define P8e(a) (TF(
[all...] |
| /linux/fs/isofs/ |
| H A D | rock.c | 418 flags = rr->u.TF.flags & TF_LONG_FORM ? ISO_DATE_LONG_FORM : 0; in parse_rock_ridge_inode_internal()
419 size = rr->u.TF.flags & TF_LONG_FORM ? 17 : 7; in parse_rock_ridge_inode_internal()
428 if ((rr->u.TF.flags & TF_CREATE) && size <= slen) { in parse_rock_ridge_inode_internal()
430 iso_date(rr->u.TF.data + size * cnt++, flags)); in parse_rock_ridge_inode_internal()
433 if ((rr->u.TF.flags & TF_MODIFY) && size <= slen) { in parse_rock_ridge_inode_internal()
435 iso_date(rr->u.TF.data + size * cnt++, flags)); in parse_rock_ridge_inode_internal()
438 if ((rr->u.TF.flags & TF_ACCESS) && size <= slen) { in parse_rock_ridge_inode_internal()
440 iso_date(rr->u.TF.data + size * cnt++, flags)); in parse_rock_ridge_inode_internal()
443 if ((rr->u.TF.flags & TF_ATTRIBUTES) && size <= slen) { in parse_rock_ridge_inode_internal()
445 iso_date(rr->u.TF in parse_rock_ridge_inode_internal()
[all...] |
| H A D | rock.h | 81 * These are the bits and their meanings for flags in the TF structure.
107 struct RR_TF_s TF; member
|
| /linux/Documentation/admin-guide/pm/ |
| H A D | intel-speed-select.rst | 75 Intel(R) SST-TF (feature turbo-freq) is supported
293 SST-TF)).
312 "speed-select-turbo-freq" (Intel(R) SST-TF) is supported at both performance
315 The Intel(R) SST-BF and the Intel(R) SST-TF features are built on a foundation
317 The platform firmware enables this feature when Intel(R) SST-BF or Intel(R) SST-TF
530 Some features like Intel(R) SST-TF can only be enabled when CLOS based prioritization
531 is enabled. For this reason, disabling while Intel(R) SST-TF is enabled can cause
532 Intel(R) SST-TF to fail. This will cause the "disable" command to display an error
533 if Intel(R) SST-TF is already enabled. In turn, to disable, the Intel(R) SST-TF
[all...] |
| /linux/drivers/iommu/ |
| H A D | mtk_iommu_v1.c | 86 #define MT2701_M4U_TF_LARB(TF) (6 - (((TF) >> 13) & 0x7)) argument
87 #define MT2701_M4U_TF_PORT(TF) (((TF) >> 8) & 0xF) argument
|
| H A D | msm_iommu_hw-8xxx.h | 461 #define SET_TF(b, c, v) SET_CONTEXT_FIELD(b, c, FSR, TF, v)
649 #define GET_TF(b, c) GET_CONTEXT_FIELD(b, c, FSR, TF)
1018 #define TF (TF_MASK << TF_SHIFT) macro
|
| /linux/arch/arm64/boot/dts/amlogic/ |
| H A D | meson-gxbb-odroidc2.dts | 283 gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En",
317 "J2 Header Pin31", "", "", "", "TF VDD En",
|
| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | sc7280-chrome-common.dtsi | 139 /* TF-A firmware maps memory cached so mark dma-coherent to match. */
|
| H A D | sc7180-idp.dts | 394 /* TF-A firmware maps memory cached so mark dma-coherent to match. */
|
| H A D | sc7180-trogdor.dtsi | 874 /* TF-A firmware maps memory cached so mark dma-coherent to match. */
|
| /linux/arch/arm64/boot/dts/allwinner/ |
| H A D | sun50i-h64-remix-mini-pc.dts | 297 /* Supplies the arisc management core, needed by TF-A to power off cores. */
|
| /linux/Documentation/trace/ |
| H A D | mmiotrace.rst | 129 marks the page present, sets TF flag to achieve single stepping and exits the
|
| /linux/Documentation/admin-guide/media/ |
| H A D | bttv.rst | 816 Provideo PV951 TF,
835 - PV-951T/TF
836 - PV-951PT/TF
837 - PV-956T/TF Low Profile
|
| /linux/net/core/ |
| H A D | filter.c | 10283 * In addition it uses Temporary Field TF (member of struct S) as the 3rd
10290 #define SOCK_ADDR_STORE_NESTED_FIELD_OFF(S, NS, F, NF, SIZE, OFF, TF) \ argument
10298 offsetof(S, TF)); \
10308 offsetof(S, TF)); \
10312 TF) \ argument
10316 OFF, TF); \
|