Searched refs:RVC_RS2S (Results 1 – 2 of 2) sorted by relevance
| /linux/arch/riscv/kernel/ |
| H A D | traps_misaligned.c | 133 #define RVC_RS2S(insn) (8 + RV_X(insn, SH_RS2C, 3)) macro
151 #define GET_RS2S(insn, regs) (*REG_PTR(RVC_RS2S(insn), 0, regs))
268 #define GET_F64_RS2S(insn, regs) (get_f64_rs(RVC_RS2S(insn), 0, regs))
272 #define GET_F32_RS2S(insn, regs) (get_f32_rs(RVC_RS2S(insn), 0, regs))
410 insn = RVC_RS2S(insn) << SH_RD; in handle_scalar_misaligned_load()
419 insn = RVC_RS2S(insn) << SH_RD; in handle_scalar_misaligned_load()
427 insn = RVC_RS2S(insn) << SH_RD; in handle_scalar_misaligned_load()
435 insn = RVC_RS2S(insn) << SH_RD; in handle_scalar_misaligned_load()
442 insn = RVC_RS2S(insn) << SH_RD; in handle_scalar_misaligned_load()
446 insn = RVC_RS2S(ins in handle_scalar_misaligned_load()
[all...] |
| /linux/arch/riscv/kvm/ |
| H A D | vcpu_insn.c | 111 #define RVC_RS2S(insn) (8 + RV_X(insn, SH_RS2C, 3)) macro
131 #define GET_RS2S(insn, regs) (*REG_PTR(RVC_RS2S(insn), 0, regs))
541 insn = RVC_RS2S(insn) << SH_RD; in kvm_riscv_vcpu_mmio_load()
550 insn = RVC_RS2S(insn) << SH_RD; in kvm_riscv_vcpu_mmio_load()
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