Searched refs:PORT_PLL_P1_MASK (Results 1 – 3 of 3) sorted by relevance
47 #define PORT_PLL_P1_MASK REG_GENMASK(15, 13) macro 48 #define PORT_PLL_P1(p1) REG_FIELD_PREP(PORT_PLL_P1_MASK, (p1))
2071 PORT_PLL_P1_MASK | PORT_PLL_P2_MASK, hw_state->ebb0); in bxt_ddi_pll_enable() 2188 hw_state->ebb0 &= PORT_PLL_P1_MASK | PORT_PLL_P2_MASK; in bxt_ddi_pll_get_hw_state() 2375 clock.p1 = REG_FIELD_GET(PORT_PLL_P1_MASK, hw_state->ebb0); in bxt_ddi_pll_get_freq()
592 clock.p1 = REG_FIELD_GET(PORT_PLL_P1_MASK, in bxt_vgpu_get_dp_bitrate()