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Searched refs:MSR_P4_ITLB_ESCR0 (Results 1 – 3 of 3) sorted by relevance

/linux/arch/x86/events/intel/
H A Dp4.c97 .escr_msr = { MSR_P4_ITLB_ESCR0, MSR_P4_ITLB_ESCR1 },
1189 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_ITLB_ESCR0),
/linux/arch/x86/include/asm/
H A Dmsr-index.h1141 #define MSR_P4_ITLB_ESCR0 0x000003b6 macro
/linux/tools/arch/x86/include/asm/
H A Dmsr-index.h1134 #define MSR_P4_ITLB_ESCR0 0x000003b6 macro