Searched refs:ARMV8_PMU_USERENR_SW (Results 1 – 3 of 3) sorted by relevance
257 #define ARMV8_PMU_USERENR_SW (1 << 1) /* PMSWINC can be written at EL0 */ macro 262 #define ARMV8_PMU_USERENR_MASK (ARMV8_PMU_USERENR_EN | ARMV8_PMU_USERENR_SW | \
257 #define ARMV8_PMU_USERENR_SW (1 << 1) /* PMSWINC can be written at EL0 */ macro 261 #define ARMV8_PMU_USERENR_MASK (ARMV8_PMU_USERENR_EN | ARMV8_PMU_USERENR_SW | \
866 return check_pmu_access_disabled(vcpu, ARMV8_PMU_USERENR_SW | ARMV8_PMU_USERENR_EN); in pmu_write_swinc_el0_disabled()