Home
last modified time | relevance | path

Searched refs:write_control_reg (Results 1 – 5 of 5) sorted by relevance

/linux/sound/pci/echoaudio/
H A Dgina24_dsp.c32 static int write_control_reg(struct echoaudio *chip, u32 value, char force);
157 err = write_control_reg(chip, control_reg, true); in load_asic()
231 return write_control_reg(chip, control_reg, false); in set_sample_rate()
279 return write_control_reg(chip, control_reg, true); in set_input_clock()
338 err = write_control_reg(chip, control_reg, true); in dsp_set_digital_mode()
H A Dlayla24_dsp.c31 static int write_control_reg(struct echoaudio *chip, u32 value, char force);
152 err = write_control_reg(chip, GML_CONVERTER_ENABLE | GML_48KHZ, in load_asic()
247 return write_control_reg(chip, control_reg, false); in set_sample_rate()
293 return write_control_reg(chip, control_reg, true); in set_input_clock()
389 err = write_control_reg(chip, control_reg, true); in dsp_set_digital_mode()
H A Dmona_dsp.c32 static int write_control_reg(struct echoaudio *chip, u32 value, char force);
153 err = write_control_reg(chip, control_reg, true); in load_asic()
295 return write_control_reg(chip, control_reg, force_write); in set_sample_rate()
356 return write_control_reg(chip, control_reg, true); in set_input_clock()
415 err = write_control_reg(chip, control_reg, false); in dsp_set_digital_mode()
H A Decho3g_dsp.c39 static int write_control_reg(struct echoaudio *chip, u32 ctl, u32 frq,
129 return write_control_reg(chip, control_reg, in set_phantom_power()
H A Dechoaudio_gml.c62 the control register. write_control_reg sends the new control register
64 static int write_control_reg(struct echoaudio *chip, u32 value, char force) in write_control_reg() function
74 dev_dbg(chip->card->dev, "write_control_reg: 0x%x\n", value); in write_control_reg()
197 err = write_control_reg(chip, control_reg, false); in set_professional_spdif()