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Searched refs:regMPCC_OGAM1_MPCC_OGAM_RAMA_START_CNTL_G (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_5_offset.h6628 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_CNTL_G 0x0185 macro
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H A Ddcn_3_5_0_offset.h12470 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_CNTL_G global() macro
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H A Ddcn_3_6_0_offset.h5622 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_CNTL_G 0x010b macro
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H A Ddcn_3_1_2_offset.h6869 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_CNTL_G 0x0185 macro
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H A Ddcn_3_1_4_offset.h13536 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_CNTL_G global() macro
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H A Ddcn_3_2_1_offset.h5170 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_CNTL_G 0x010b macro
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H A Ddcn_3_5_1_offset.h12449 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_CNTL_G global() macro
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H A Ddcn_4_1_0_offset.h5710 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_CNTL_G 0x00e1 macro
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H A Ddcn_3_1_6_offset.h7089 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_CNTL_G 0x0185 macro
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