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Searched refs:regDWB_OGAM_RAMA_END_CNTL1_G (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_5_offset.h910 #define regDWB_OGAM_RAMA_END_CNTL1_G 0x32b2 macro
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H A Ddcn_3_5_0_offset.h11136 #define regDWB_OGAM_RAMA_END_CNTL1_G global() macro
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H A Ddcn_3_6_0_offset.h1064 #define regDWB_OGAM_RAMA_END_CNTL1_G 0x32b2 macro
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H A Ddcn_3_1_2_offset.h1207 #define regDWB_OGAM_RAMA_END_CNTL1_G 0x32b2 macro
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H A Ddcn_3_1_4_offset.h12240 #define regDWB_OGAM_RAMA_END_CNTL1_G global() macro
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H A Ddcn_3_2_1_offset.h814 #define regDWB_OGAM_RAMA_END_CNTL1_G 0x32b2 macro
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H A Ddcn_3_5_1_offset.h11115 #define regDWB_OGAM_RAMA_END_CNTL1_G global() macro
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H A Ddcn_4_1_0_offset.h943 #define regDWB_OGAM_RAMA_END_CNTL1_G 0x32b2 macro
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H A Ddcn_3_1_6_offset.h1411 #define regDWB_OGAM_RAMA_END_CNTL1_G 0x32b2 macro
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