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Searched refs:regDC_GPIO_DDC5_A_BASE_IDX (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h6315 #define regDC_GPIO_DDC5_A_BASE_IDX 2 macro
H A Ddpcs_4_2_0_offset.h655 #define regDC_GPIO_DDC5_A_BASE_IDX 2 macro
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H A Ddpcs_4_2_3_offset.h688 #define regDC_GPIO_DDC5_A_BASE_IDX 2 macro
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H A Ddpcs_4_2_2_offset.h652 #define regDC_GPIO_DDC5_A_BASE_IDX 2 macro
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/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_5_offset.h11609 #define regDC_GPIO_DDC5_A_BASE_IDX global() macro
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H A Ddcn_3_5_0_offset.h9862 #define regDC_GPIO_DDC5_A_BASE_IDX 2 macro
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H A Ddcn_3_6_0_offset.h11943 #define regDC_GPIO_DDC5_A_BASE_IDX global() macro
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H A Ddcn_3_1_2_offset.h11864 #define regDC_GPIO_DDC5_A_BASE_IDX global() macro
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H A Ddcn_3_1_4_offset.h10973 #define regDC_GPIO_DDC5_A_BASE_IDX global() macro
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H A Ddcn_3_2_1_offset.h11023 #define regDC_GPIO_DDC5_A_BASE_IDX global() macro
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H A Ddcn_3_5_1_offset.h9841 #define regDC_GPIO_DDC5_A_BASE_IDX 2 macro
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H A Ddcn_4_1_0_offset.h11304 #define regDC_GPIO_DDC5_A_BASE_IDX global() macro
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H A Ddcn_3_1_6_offset.h12100 #define regDC_GPIO_DDC5_A_BASE_IDX global() macro
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