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Searched refs:regAFMT4_AFMT_MEM_PWR_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_5_offset.h11013 #define regAFMT4_AFMT_MEM_PWR_BASE_IDX global() macro
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H A Ddcn_3_5_0_offset.h9464 #define regAFMT4_AFMT_MEM_PWR_BASE_IDX 2 macro
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H A Ddcn_3_6_0_offset.h11307 #define regAFMT4_AFMT_MEM_PWR_BASE_IDX global() macro
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H A Ddcn_3_1_2_offset.h11268 #define regAFMT4_AFMT_MEM_PWR_BASE_IDX global() macro
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H A Ddcn_3_1_4_offset.h10589 #define regAFMT4_AFMT_MEM_PWR_BASE_IDX global() macro
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H A Ddcn_3_2_1_offset.h10445 #define regAFMT4_AFMT_MEM_PWR_BASE_IDX global() macro
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H A Ddcn_3_5_1_offset.h9443 #define regAFMT4_AFMT_MEM_PWR_BASE_IDX 2 macro
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H A Ddcn_4_1_0_offset.h12822 #define regAFMT4_AFMT_MEM_PWR_BASE_IDX global() macro
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H A Ddcn_3_1_6_offset.h11492 #define regAFMT4_AFMT_MEM_PWR_BASE_IDX global() macro
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