Home
last modified time | relevance | path

Searched refs:mmUVD_RB_SIZE3_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_offset.h137 #define mmUVD_RB_SIZE3_BASE_IDX 1 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_offset.h297 #define mmUVD_RB_SIZE3_BASE_IDX 1 macro
H A Dvcn_2_5_offset.h576 #define mmUVD_RB_SIZE3_BASE_IDX 1 macro
H A Dvcn_2_0_0_offset.h487 #define mmUVD_RB_SIZE3_BASE_IDX 1 macro
H A Dvcn_3_0_0_offset.h906 #define mmUVD_RB_SIZE3_BASE_IDX 1 macro