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Searched refs:mmUVD_JRBC_ENC_RB_SIZE_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_5_offset.h214 #define mmUVD_JRBC_ENC_RB_SIZE_BASE_IDX 0 macro
H A Dvcn_2_0_0_offset.h199 #define mmUVD_JRBC_ENC_RB_SIZE_BASE_IDX 0 macro
H A Dvcn_3_0_0_offset.h412 #define mmUVD_JRBC_ENC_RB_SIZE_BASE_IDX 0 macro