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Searched refs:mmTHM_THERMAL_INT_CTRL (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/thm/
H A Dthm_11_0_2_offset.h46 #define mmTHM_THERMAL_INT_CTRL 0x000b macro
H A Dthm_10_0_offset.h40 #define mmTHM_THERMAL_INT_CTRL 0x000b macro
H A Dthm_9_0_offset.h48 #define mmTHM_THERMAL_INT_CTRL 0x000b macro
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega12_thermal.c189 val = RREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL); in vega12_thermal_set_temperature_range()
199 WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val); in vega12_thermal_set_temperature_range()
H A Dvega20_thermal.c260 val = RREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL); in vega20_thermal_set_temperature_range()
270 WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val); in vega20_thermal_set_temperature_range()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dsmu_v11_0.c1342 val = RREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL); in smu_v11_0_set_irq_state()
1345 WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val); in smu_v11_0_set_irq_state()
1362 val = RREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL); in smu_v11_0_set_irq_state()
1370 WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val); in smu_v11_0_set_irq_state()