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Searched refs:mmMC_VM_NB_MMIOBASE_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_9_3_0_offset.h1911 #define mmMC_VM_NB_MMIOBASE_BASE_IDX 0 macro
H A Dmmhub_1_0_offset.h1914 #define mmMC_VM_NB_MMIOBASE_BASE_IDX 0 macro
H A Dmmhub_9_1_offset.h1923 #define mmMC_VM_NB_MMIOBASE_BASE_IDX 0 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h1643 #define mmMC_VM_NB_MMIOBASE_BASE_IDX 0 macro
H A Dgc_9_2_1_offset.h1600 #define mmMC_VM_NB_MMIOBASE_BASE_IDX 0 macro
H A Dgc_9_1_offset.h1662 #define mmMC_VM_NB_MMIOBASE_BASE_IDX 0 macro