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Searched refs:mmGCR_PIO_CNTL_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h3142 #define mmGCR_PIO_CNTL_BASE_IDX 0 macro
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H A Dgc_10_3_0_offset.h3079 #define mmGCR_PIO_CNTL_BASE_IDX 0 macro
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