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Searched refs:mmDSCL3_DSCL_CONTROL_BASE_IDX (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_1_offset.h3088 #define mmDSCL3_DSCL_CONTROL_BASE_IDX 2 macro
H A Ddcn_3_0_1_offset.h5441 #define mmDSCL3_DSCL_CONTROL_BASE_IDX 2 macro
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H A Ddcn_1_0_offset.h4945 #define mmDSCL3_DSCL_CONTROL_BASE_IDX 2 macro
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H A Ddcn_2_1_0_offset.h5093 #define mmDSCL3_DSCL_CONTROL_BASE_IDX 2 macro
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H A Ddcn_3_0_2_offset.h5985 #define mmDSCL3_DSCL_CONTROL_BASE_IDX 2 macro
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H A Ddcn_2_0_0_offset.h6031 #define mmDSCL3_DSCL_CONTROL_BASE_IDX 2 macro
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H A Ddcn_3_0_0_offset.h6036 #define mmDSCL3_DSCL_CONTROL_BASE_IDX 2 macro
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