xref: /linux/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/matcher.h (revision 59807d071724f4e639fa9ebf841b12fb97e5dbf2)
1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
2 /* Copyright (c) 2024 NVIDIA Corporation & Affiliates */
3 
4 #ifndef HWS_MATCHER_H_
5 #define HWS_MATCHER_H_
6 
7 /* We calculated that concatenating a collision table to the main table with
8  * 3% of the main table rows will be enough resources for high insertion
9  * success probability.
10  *
11  * The calculation: log2(2^x * 3 / 100) = log2(2^x) + log2(3/100) = x - 5.05 ~ 5
12  */
13 #define MLX5HWS_MATCHER_ASSURED_ROW_RATIO 5
14 /* Threshold to determine if amount of rules require a collision table */
15 #define MLX5HWS_MATCHER_ASSURED_RULES_TH 10
16 /* Required depth of an assured collision table */
17 #define MLX5HWS_MATCHER_ASSURED_COL_TBL_DEPTH 4
18 /* Required depth of the main large table */
19 #define MLX5HWS_MATCHER_ASSURED_MAIN_TBL_DEPTH 2
20 
21 /* Action RTC size multiplier that is required in order
22  * to support rule update for rules with action STEs.
23  */
24 #define MLX5HWS_MATCHER_ACTION_RTC_UPDATE_MULT 1
25 
26 /* Maximum number of action templates that can be attached to a matcher. */
27 #define MLX5HWS_MATCHER_MAX_AT 128
28 
29 enum mlx5hws_matcher_offset {
30 	MLX5HWS_MATCHER_OFFSET_TAG_DW1 = 12,
31 	MLX5HWS_MATCHER_OFFSET_TAG_DW0 = 13,
32 };
33 
34 enum mlx5hws_matcher_flags {
35 	MLX5HWS_MATCHER_FLAGS_COLLISION = 1 << 2,
36 	MLX5HWS_MATCHER_FLAGS_RESIZABLE	= 1 << 3,
37 	MLX5HWS_MATCHER_FLAGS_ISOLATED	= 1 << 4,
38 };
39 
40 struct mlx5hws_match_template {
41 	struct mlx5hws_definer *definer;
42 	struct mlx5hws_definer_fc *fc;
43 	u32 *match_param;
44 	u8 match_criteria_enable;
45 	u16 fc_sz;
46 };
47 
48 struct mlx5hws_matcher_match_ste {
49 	u32 rtc_0_id;
50 	u32 rtc_1_id;
51 	u32 ste_0_base;
52 	u32 ste_1_base;
53 };
54 
55 enum {
56 	MLX5HWS_MATCHER_IPV_UNSET = 0,
57 	MLX5HWS_MATCHER_IPV_4 = 1,
58 	MLX5HWS_MATCHER_IPV_6 = 2,
59 };
60 
61 struct mlx5hws_matcher {
62 	struct mlx5hws_table *tbl;
63 	struct mlx5hws_matcher_attr attr;
64 	struct mlx5hws_match_template *mt;
65 	struct mlx5hws_action_template *at;
66 	u8 num_of_at;
67 	u8 size_of_at_array;
68 	u8 num_of_mt;
69 	u8 num_of_action_stes;
70 	/* enum mlx5hws_matcher_flags */
71 	u8 flags;
72 	u8 matches_outer_ethertype:1;
73 	u8 matches_outer_ip_version:1;
74 	u8 matches_inner_ethertype:1;
75 	u8 matches_inner_ip_version:1;
76 	u8 outer_ip_version:2;
77 	u8 inner_ip_version:2;
78 	u32 end_ft_id;
79 	struct mlx5hws_matcher *col_matcher;
80 	struct mlx5hws_matcher *resize_dst;
81 	struct mlx5hws_matcher_match_ste match_ste;
82 	struct list_head list_node;
83 };
84 
85 static inline bool
mlx5hws_matcher_mt_is_jumbo(struct mlx5hws_match_template * mt)86 mlx5hws_matcher_mt_is_jumbo(struct mlx5hws_match_template *mt)
87 {
88 	return mlx5hws_definer_is_jumbo(mt->definer);
89 }
90 
mlx5hws_matcher_is_resizable(struct mlx5hws_matcher * matcher)91 static inline bool mlx5hws_matcher_is_resizable(struct mlx5hws_matcher *matcher)
92 {
93 	return !!(matcher->flags & MLX5HWS_MATCHER_FLAGS_RESIZABLE);
94 }
95 
mlx5hws_matcher_is_in_resize(struct mlx5hws_matcher * matcher)96 static inline bool mlx5hws_matcher_is_in_resize(struct mlx5hws_matcher *matcher)
97 {
98 	return !!matcher->resize_dst;
99 }
100 
mlx5hws_matcher_is_isolated(struct mlx5hws_matcher * matcher)101 static inline bool mlx5hws_matcher_is_isolated(struct mlx5hws_matcher *matcher)
102 {
103 	return !!(matcher->flags & MLX5HWS_MATCHER_FLAGS_ISOLATED);
104 }
105 
mlx5hws_matcher_is_insert_by_idx(struct mlx5hws_matcher * matcher)106 static inline bool mlx5hws_matcher_is_insert_by_idx(struct mlx5hws_matcher *matcher)
107 {
108 	return matcher->attr.insert_mode == MLX5HWS_MATCHER_INSERT_BY_INDEX;
109 }
110 
111 int mlx5hws_matcher_update_end_ft_isolated(struct mlx5hws_table *tbl,
112 					   u32 miss_ft_id);
113 
114 #endif /* HWS_MATCHER_H_ */
115