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/linux/arch/arm64/boot/dts/renesas/
H A Drzg2lc-smarc.dtsi180 * SW1 should be at position 2->3 so that SER0_CTS# line is activated
181 * SW2 should be at position 2->3 so that SER0_TX line is activated
182 * SW3 should be at position 2->3 so that SER0_RX line is activated
183 * SW4 should be at position 2->3 so that SER0_RTS# line is activated
H A Drzg2l-smarc-pinfunction.dtsi20 /* SW7 should be at position 2->3 so that GPIO8_CAN0_STB line is activated */
33 /* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */
H A Dr8a774e1-hihope-rzg2h-ex.dts17 /* Set SW43 = ON and SW1001[7] = OFF for SATA port to be activated */
H A Dr8a774b1-hihope-rzg2n-ex.dts18 /* Set SW43 = ON and SW1001[7] = OFF for SATA port to be activated */
H A Dr8a774a1-hihope-rzg2m-ex.dts18 /* SW43 should be OFF, if in ON state SATA port will be activated */
H A Dr8a774a1-hihope-rzg2m-rev2-ex.dts17 /* SW43 should be OFF, if in ON state SATA port will be activated */
/linux/drivers/ntb/hw/idt/
H A DKconfig16 First of all partitions must be activated and properly assigned to all
17 the ports with NT-functions intended to be activated (see SWPARTxCTL
/linux/drivers/thunderbolt/
H A Dpath.c160 path->activated = true; in tb_path_discover()
479 if (!path->activated) { in tb_path_deactivate()
491 path->activated = false; in tb_path_deactivate()
507 if (path->activated) { in tb_path_activate()
508 tb_WARN(path->tb, "trying to activate already activated path\n"); in tb_path_activate()
583 path->activated = true; in tb_path_activate()
/linux/Documentation/devicetree/bindings/usb/
H A Datmel-usb.txt17 activated for the bus to be powered.
19 activated for the overcurrent detection.
71 activated for the bus to be powered.
H A Dpxa-usb.txt43 - gpio activated to control the USB D+ pullup (see gpio.txt)
/linux/fs/ntfs3/
H A DKconfig22 If activated 64 bits per clusters you will be able to use 4k cluster
33 If activated you will be able to read such files correctly.
/linux/arch/arm64/boot/dts/marvell/
H A Dcn9132-db-B.dts15 * Since CP0 SPI1 and CP0 NAND are sharing some pins, they cannot be activated
H A Dcn9132-db.dts15 * Since CP0 SPI1 and CP0 NAND are sharing some pins, they cannot be activated
H A Dcn9130-db.dts15 * Since CP0 SPI1 and CP0 NAND are sharing some pins, they cannot be activated
H A Dcn9131-db.dts15 * Since CP0 SPI1 and CP0 NAND are sharing some pins, they cannot be activated
H A Dcn9131-db-B.dts15 * Since CP0 SPI1 and CP0 NAND are sharing some pins, they cannot be activated
H A Dcn9130-db-B.dts15 * Since CP0 SPI1 and CP0 NAND are sharing some pins, they cannot be activated
/linux/Documentation/ABI/testing/
H A Dsysfs-driver-ccp73 whether the HSP TPM has been activated.
75 0: Not activated or present
H A Dsysfs-bus-coresight-devices-dummy-source5 Description: (RW) Enable/disable tracing of dummy source. A sink should be activated
/linux/Documentation/ABI/obsolete/
H A Dsysfs-driver-hid-roccat-arvo40 When written, the given buttons are activated/deactivated
52 When written, the key is activated/deactivated immediately.
/linux/Documentation/leds/
H A Dleds-lm3556.rst23 CONTROL REGISTER(0x09).Flash mode is activated by the ENABLE REGISTER(0x0A),
51 REGISTER(0x09).Torch Mode is activated by the ENABLE REGISTER(0x0A) or by the
/linux/arch/loongarch/kernel/
H A Dkgdb.c635 int i, activated = 0; in kgdb_correct_hw_break() local
660 activated = 1; in kgdb_correct_hw_break()
663 csr_xchg32(activated ? CSR_CRMD_WE : 0, CSR_CRMD_WE, LOONGARCH_CSR_CRMD); in kgdb_correct_hw_break()
664 kgdb_watch_activated = activated; in kgdb_correct_hw_break()
/linux/Documentation/devicetree/bindings/net/can/
H A Dgrcan.txt25 a bug workaround is activated.
/linux/Documentation/admin-guide/device-mapper/
H A Ddm-queue-length.rst16 the default value, see the activated table.
/linux/Documentation/tools/rv/
H A Drv-mon-sched.rst30 Nevertheless nested monitors can also be activated independently both by name

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